From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Chao Zhu" Subject: =?gb2312?b?tPC4tDogIFtQQVRDSF0gZWFsL3BwYzY0OiBhZGQg?= =?gb2312?b?c3VwcG9ydCBmb3IgcnRlIHBhdXNl?= Date: Fri, 12 Oct 2018 10:24:16 +0800 Message-ID: <000001d461d2$adc87910$09596b30$@linux.vnet.ibm.com> References: <20181007061857.29451-1-jerin.jacob@caviumnetworks.com> Mime-Version: 1.0 Content-Type: text/plain; charset="gb2312" Content-Transfer-Encoding: quoted-printable Cc: , , , To: "'Jerin Jacob'" Return-path: Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by dpdk.org (Postfix) with ESMTP id 1F1731B107 for ; Fri, 12 Oct 2018 04:25:25 +0200 (CEST) Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w9C2PKe8063726 for ; Thu, 11 Oct 2018 22:25:24 -0400 Received: from e06smtp05.uk.ibm.com (e06smtp05.uk.ibm.com [195.75.94.101]) by mx0b-001b2d01.pphosted.com with ESMTP id 2n2hcmttfv-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 11 Oct 2018 22:25:23 -0400 Received: from localhost by e06smtp05.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Fri, 12 Oct 2018 03:24:21 +0100 In-Reply-To: <20181007061857.29451-1-jerin.jacob@caviumnetworks.com> Content-Language: zh-cn List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" -----=D3=CA=BC=FE=D4=AD=BC=FE----- =B7=A2=BC=FE=C8=CB: Jerin Jacob =20 =B7=A2=CB=CD=CA=B1=BC=E4: 2018=C4=EA10=D4=C27=C8=D5 14:19 =CA=D5=BC=FE=C8=CB: Chao Zhu =B3=AD=CB=CD: dev@dpdk.org; thomas@monjalon.net; = gowrishankar.m@linux.vnet.ibm.com; ola.liljedahl@arm.com; Jerin Jacob =D6=F7=CC=E2: [dpdk-dev] [PATCH] eal/ppc64: add support for rte pause Add support for rte_pause() implementation for ppc64. Signed-off-by: Jerin Jacob --- The reference implementation for Linux's cpu_relax() for ppc64 is at https://elixir.bootlin.com/linux/latest/source/arch/powerpc/include/asm/p= roc essor.h#L440 --- lib/librte_eal/common/include/arch/ppc_64/rte_pause.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_pause.h b/lib/librte_eal/common/include/arch/ppc_64/rte_pause.h index 8bd835764..16e47ce22 100644 --- a/lib/librte_eal/common/include/arch/ppc_64/rte_pause.h +++ b/lib/librte_eal/common/include/arch/ppc_64/rte_pause.h @@ -9,10 +9,17 @@ extern "C" { #endif +#include "rte_atomic.h" + #include "generic/rte_pause.h" static inline void rte_pause(void) { + /* Set hardware multi-threading low priority */ + asm volatile("or 1,1,1"); + /* Set hardware multi-threading medium priority */ + asm volatile("or 2,2,2"); + rte_compiler_barrier(); } #ifdef __cplusplus --=20 2.19.0 Acked-by: Chao Zhu