From mboxrd@z Thu Jan 1 00:00:00 1970 From: Martin Weiser Subject: Re: [PATCH v2] cxgbe: report 100G link speed capability for Chelsio T6 adapters Date: Thu, 22 Jun 2017 11:59:15 +0200 Message-ID: <08f7632b-e6d5-35ad-9a8c-fc17160890d3@allegro-packets.com> References: <1498121851-33487-1-git-send-email-martin.weiser@allegro-packets.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Cc: "dev@dpdk.org" To: "Van Haaren, Harry" , "rahul.lakkireddy@chelsio.com" Return-path: Received: from smtprelay09.ispgateway.de (smtprelay09.ispgateway.de [134.119.228.118]) by dpdk.org (Postfix) with ESMTP id 224294C57 for ; Thu, 22 Jun 2017 11:59:27 +0200 (CEST) In-Reply-To: Content-Language: en-US List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" >> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Martin Weiser >> Sent: Thursday, June 22, 2017 9:58 AM >> To: rahul.lakkireddy@chelsio.com >> Cc: dev@dpdk.org; Martin Weiser >> Subject: [dpdk-dev] [PATCH v2] cxgbe: report 100G link speed capabilit= y for Chelsio T6 >> adapters >> >> These adapters support 100G link speed but the speed_capa bitmask in t= he >> device info did not reflect that. >> >> Signed-off-by: Martin Weiser >> --- >> drivers/net/cxgbe/cxgbe_ethdev.c | 6 +++++- >> 1 file changed, 5 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/net/cxgbe/cxgbe_ethdev.c b/drivers/net/cxgbe/cxgb= e_ethdev.c >> index b622d25..b0d5ed7 100644 >> --- a/drivers/net/cxgbe/cxgbe_ethdev.c >> +++ b/drivers/net/cxgbe/cxgbe_ethdev.c >> @@ -175,7 +175,11 @@ static void cxgbe_dev_info_get(struct rte_eth_dev= *eth_dev, >> >> device_info->rx_desc_lim =3D cxgbe_desc_lim; >> device_info->tx_desc_lim =3D cxgbe_desc_lim; >> - device_info->speed_capa =3D ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G;= >> + if (CHELSIO_CHIP_VERSION(adapter->params.chip) =3D=3D CHELSIO_T6) >> + device_info->speed_capa =3D ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G= | >> + ETH_LINK_SPEED_100G; >> + else >> + device_info->speed_capa =3D ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G= ; >> } > > I think the following code is simpler and shows intent clearer? > No objection to the patch above from me, just a suggestion :) > > > device_info->speed_capa =3D ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G; > > if (CHELSIO_CHIP_VERSION(adapter->params.chip) =3D=3D CHELSIO_T6) > device_info->speed_capa |=3D ETH_LINK_SPEED_100G; Yes, that looks better :). I will send a v3.