From mboxrd@z Thu Jan 1 00:00:00 1970 From: Roman Dementiev Subject: [PATCH v2 0/3] add support for HTM lock elision for x86 Date: Tue, 16 Jun 2015 10:16:43 -0700 Message-ID: <1434475006-13732-1-git-send-email-roman.dementiev@intel.com> References: <1433250693-23644-1-git-send-email-roman.dementiev@intel.com> To: dev@dpdk.org Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 7C805C320 for ; Tue, 16 Jun 2015 19:17:27 +0200 (CEST) In-Reply-To: <1433250693-23644-1-git-send-email-roman.dementiev@intel.com> List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This series of patches adds methods that use hardware memory transactions (HTM) on fast-path for DPDK locks (a.k.a. lock elision). Here the methods are implemented for x86 using Restricted Transactional Memory instructions (Intel(r) Transactional Synchronization Extensions). The implementation fall-backs to the normal DPDK lock if HTM is not available or memory transactions fail. This is not a replacement for ALL lock usages since not all critical sections protected by locks are friendly to HTM. For example, an attempt to perform a HW I/O operation inside a hardware memory transaction always aborts the transaction since the CPU is not able to roll-back should the transaction fail. Therefore, hardware transactional locks are not advised to be used around rte_eth_rx_burst() and rte_eth_tx_burst() calls. v2 changes -added a documentation note about hardware limitations Roman Dementiev (3): spinlock: add support for HTM lock elision for x86 rwlock: add support for HTM lock elision for x86 test scaling of HTM lock elision protecting rte_hash app/test/Makefile | 1 + app/test/test_hash_scaling.c | 223 +++++++++++++++++++++ lib/librte_eal/common/Makefile | 4 +- .../common/include/arch/ppc_64/rte_rwlock.h | 38 ++++ .../common/include/arch/ppc_64/rte_spinlock.h | 41 ++++ lib/librte_eal/common/include/arch/x86/rte_rtm.h | 73 +++++++ .../common/include/arch/x86/rte_rwlock.h | 82 ++++++++ .../common/include/arch/x86/rte_spinlock.h | 107 ++++++++++ lib/librte_eal/common/include/generic/rte_rwlock.h | 208 +++++++++++++++++++ .../common/include/generic/rte_spinlock.h | 99 +++++++++ lib/librte_eal/common/include/rte_rwlock.h | 158 --------------- 11 files changed, 874 insertions(+), 160 deletions(-) create mode 100644 app/test/test_hash_scaling.c create mode 100644 lib/librte_eal/common/include/arch/ppc_64/rte_rwlock.h create mode 100644 lib/librte_eal/common/include/arch/x86/rte_rtm.h create mode 100644 lib/librte_eal/common/include/arch/x86/rte_rwlock.h create mode 100644 lib/librte_eal/common/include/generic/rte_rwlock.h delete mode 100644 lib/librte_eal/common/include/rte_rwlock.h -- 1.9.5.msysgit.0 Intel GmbH Dornacher Strasse 1 85622 Feldkirchen/Muenchen, Deutschland Sitz der Gesellschaft: Feldkirchen bei Muenchen Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk Registergericht: Muenchen HRB 47456 Ust.-IdNr./VAT Registration No.: DE129385895 Citibank Frankfurt a.M. (BLZ 502 109 00) 600119052