From mboxrd@z Thu Jan 1 00:00:00 1970 From: Zhigang Lu Subject: [PATCH v5 00/11] Introducing the TILE-Gx platform Date: Thu, 9 Jul 2015 16:25:09 +0800 Message-ID: <1436430321-3864-1-git-send-email-zlu@ezchip.com> Mime-Version: 1.0 Content-Type: text/plain To: Return-path: Received: from emea01-am1-obe.outbound.protection.outlook.com (mail-am1on0059.outbound.protection.outlook.com [157.56.112.59]) by dpdk.org (Postfix) with ESMTP id 31EDC5A8C for ; Thu, 9 Jul 2015 10:25:43 +0200 (CEST) List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This series adds support for the EZchip TILE-Gx family of SoCs. The architecture port in itself is fairly straight forward due to its reliance on generics for the most part. In addition to adding TILE-Gx architecture specific code, this series includes a few cross-platform fixes for DPDK (cpuflags, SSE related, etc.), as well as minor extensions to to accomodate a wider range of hugepage sizes and configurable mempool element alignment boundaries. Changes in this series: v5: Added the Signed-off-by line for Cyril. v4: Added the Acked-by line, removed an already checked-in patch. Also amended commit log for "eal: allow empty compile time flags". v3: Renewed the Signed-off-by line. v2: Removed RTE_LIBNAME per Thomas' feedback. Cyril Chemparathy (10): test: limit x86 cpuflags checks to x86 builds hash: check SSE flags only on x86 builds config: remove RTE_LIBNAME definition. memzone: refactor rte_memzone_reserve() variants memzone: allow multiple pagesizes to be requested mempool: allow config override on element alignment tile: add page sizes for TILE-Gx/Mx platforms tile: initial TILE-Gx support. tile: Add TILE-Gx mPIPE poll mode driver. maintainers: claim responsibility for TILE-Gx platform Zhigang Lu (1): eal: allow empty compile time flags RTE_COMPILE_TIME_CPUFLAGS MAINTAINERS | 4 + app/test/test_cpuflags.c | 6 +- config/common_bsdapp | 1 - config/common_linuxapp | 1 - config/defconfig_ppc_64-power8-linuxapp-gcc | 2 - config/defconfig_tile-tilegx-linuxapp-gcc | 70 + drivers/net/Makefile | 1 + drivers/net/mpipe/Makefile | 46 + drivers/net/mpipe/mpipe_tilegx.c | 1637 ++++++++++++++++++++ lib/librte_eal/common/eal_common_cpuflags.c | 5 +- lib/librte_eal/common/eal_common_memzone.c | 141 +- .../common/include/arch/tile/rte_atomic.h | 86 + .../common/include/arch/tile/rte_byteorder.h | 91 ++ .../common/include/arch/tile/rte_cpuflags.h | 85 + .../common/include/arch/tile/rte_cycles.h | 70 + .../common/include/arch/tile/rte_memcpy.h | 93 ++ .../common/include/arch/tile/rte_prefetch.h | 61 + .../common/include/arch/tile/rte_rwlock.h | 70 + .../common/include/arch/tile/rte_spinlock.h | 92 ++ lib/librte_eal/common/include/rte_memory.h | 16 +- lib/librte_eal/common/include/rte_memzone.h | 50 +- lib/librte_hash/rte_hash_crc.h | 2 + lib/librte_mempool/rte_mempool.c | 16 +- lib/librte_mempool/rte_mempool.h | 6 + mk/arch/tile/rte.vars.mk | 39 + mk/machine/tilegx/rte.vars.mk | 57 + mk/rte.app.mk | 1 + mk/rte.vars.mk | 5 +- 28 files changed, 2637 insertions(+), 117 deletions(-) create mode 100644 config/defconfig_tile-tilegx-linuxapp-gcc create mode 100644 drivers/net/mpipe/Makefile create mode 100644 drivers/net/mpipe/mpipe_tilegx.c create mode 100644 lib/librte_eal/common/include/arch/tile/rte_atomic.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_byteorder.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cpuflags.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cycles.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_memcpy.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_prefetch.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_rwlock.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_spinlock.h create mode 100644 mk/arch/tile/rte.vars.mk create mode 100644 mk/machine/tilegx/rte.vars.mk -- 2.1.2