From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Chen Jing D(Mark)" Subject: [PATCH] fm10k: fix improper RETA table config Date: Fri, 10 Jul 2015 16:19:20 +0800 Message-ID: <1436516360-439-1-git-send-email-jing.d.chen@intel.com> Cc: shaopeng.he@intel.com To: dev@dpdk.org Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id 6C2F32A5E for ; Fri, 10 Jul 2015 10:19:31 +0200 (CEST) List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: "Chen Jing D(Mark)" fm10k has 128 RETA entries in 32 registers, but it only initialized first 32 when doing multiple rx queue configurations. This fix will initialize all 128 entries instead. Signed-off-by: Chen Jing D(Mark) --- drivers/net/fm10k/fm10k_ethdev.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/net/fm10k/fm10k_ethdev.c b/drivers/net/fm10k/fm10k_ethdev.c index f12d0c8..a300711 100644 --- a/drivers/net/fm10k/fm10k_ethdev.c +++ b/drivers/net/fm10k/fm10k_ethdev.c @@ -329,7 +329,7 @@ fm10k_dev_mq_rx_configure(struct rte_eth_dev *dev) * little-endian order. */ reta = 0; - for (i = 0, j = 0; i < FM10K_RETA_SIZE; i++, j++) { + for (i = 0, j = 0; i < FM10K_MAX_RSS_INDICES; i++, j++) { if (j == dev->data->nb_rx_queues) j = 0; reta = (reta << CHAR_BIT) | j; -- 1.7.7.6