From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jerin Jacob Subject: [PATCH v2 1/4] eal: Introduce new cache macro definitions Date: Thu, 10 Dec 2015 22:06:15 +0530 Message-ID: <1449765378-29563-2-git-send-email-jerin.jacob@caviumnetworks.com> References: <1449417564-29600-1-git-send-email-jerin.jacob@caviumnetworks.com> <1449765378-29563-1-git-send-email-jerin.jacob@caviumnetworks.com> Mime-Version: 1.0 Content-Type: text/plain To: Return-path: Received: from na01-by2-obe.outbound.protection.outlook.com (mail-by2on0073.outbound.protection.outlook.com [207.46.100.73]) by dpdk.org (Postfix) with ESMTP id 68A5A8E79 for ; Thu, 10 Dec 2015 17:37:10 +0100 (CET) In-Reply-To: <1449765378-29563-1-git-send-email-jerin.jacob@caviumnetworks.com> List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" - RTE_CACHE_MIN_LINE_SIZE(Supported minimum cache line size) - __rte_cache_min_aligned(Force minimum cache line alignment) - RTE_CACHE_LINE_SIZE_LOG2(Express cache line size in terms of log2) Signed-off-by: Jerin Jacob Suggested-by: Konstantin Ananyev --- lib/librte_eal/common/include/rte_memory.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/lib/librte_eal/common/include/rte_memory.h b/lib/librte_eal/common/include/rte_memory.h index 9c9e40f..b67a76f 100644 --- a/lib/librte_eal/common/include/rte_memory.h +++ b/lib/librte_eal/common/include/rte_memory.h @@ -77,11 +77,27 @@ enum rte_page_sizes { (RTE_CACHE_LINE_SIZE * ((size + RTE_CACHE_LINE_SIZE - 1) / RTE_CACHE_LINE_SIZE)) /**< Return the first cache-aligned value greater or equal to size. */ +/**< Cache line size in terms of log2 */ +#if RTE_CACHE_LINE_SIZE == 64 +#define RTE_CACHE_LINE_SIZE_LOG2 6 +#elif RTE_CACHE_LINE_SIZE == 128 +#define RTE_CACHE_LINE_SIZE_LOG2 7 +#else +#error "Unsupported cache line size" +#endif + +#define RTE_CACHE_MIN_LINE_SIZE 64 /**< Minimum Cache line size. */ + /** * Force alignment to cache line. */ #define __rte_cache_aligned __rte_aligned(RTE_CACHE_LINE_SIZE) +/** + * Force minimum cache line alignment. + */ +#define __rte_cache_min_aligned __rte_aligned(RTE_CACHE_MIN_LINE_SIZE) + typedef uint64_t phys_addr_t; /**< Physical address definition. */ #define RTE_BAD_PHYS_ADDR ((phys_addr_t)-1) -- 2.1.0