From mboxrd@z Thu Jan 1 00:00:00 1970 From: Wenzhuo Lu Subject: [PATCH v2 06/11] ixgbe/base: add register definition for SGMII busy Date: Sun, 14 Feb 2016 16:55:01 +0800 Message-ID: <1455440106-28547-7-git-send-email-wenzhuo.lu@intel.com> References: <1453171693-25571-1-git-send-email-wenzhuo.lu@intel.com> <1455440106-28547-1-git-send-email-wenzhuo.lu@intel.com> To: dev@dpdk.org Return-path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id AE3E7C12C for ; Sun, 14 Feb 2016 09:55:26 +0100 (CET) In-Reply-To: <1455440106-28547-1-git-send-email-wenzhuo.lu@intel.com> List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The X550EM_a device provides the MAC_SGMII_BUSY register to indicate when slow SGMII register writes complete. Add definitions for the register. No definitions are provided for the individual bits under the theory that it is better to wait for everything to complete when needed rather than try to map out which reads need to wait for which writes. So we should wait when anything is marked as "busy". Signed-off-by: Wenzhuo Lu --- drivers/net/ixgbe/base/ixgbe_type.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h index 9c2a89a..daa4182 100644 --- a/drivers/net/ixgbe/base/ixgbe_type.h +++ b/drivers/net/ixgbe/base/ixgbe_type.h @@ -1285,6 +1285,7 @@ struct ixgbe_dmac_config { #define IXGBE_XPCSS 0x04290 #define IXGBE_MFLCN 0x04294 #define IXGBE_SERDESC 0x04298 +#define IXGBE_MAC_SGMII_BUSY 0x04298 #define IXGBE_MACS 0x0429C #define IXGBE_AUTOC 0x042A0 #define IXGBE_LINKS 0x042A4 -- 1.9.3