From mboxrd@z Thu Jan 1 00:00:00 1970 From: Wang Xiao W Subject: [PATCH] ixgbe: return err for too many interrupt queues Date: Mon, 28 Mar 2016 08:39:56 +0800 Message-ID: <1459125596-8773-1-git-send-email-xiao.w.wang@intel.com> Cc: dev@dpdk.org, Wang Xiao W To: wenzhuo.lu@intel.com Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 8C6BA11A2 for ; Mon, 28 Mar 2016 02:40:03 +0200 (CEST) List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The lower 16 bits of EICR register are used for queue interrupts, dpdk framework take over the first bit for other interrupts like LSC, so there're only 15 bits left for queue interrupts mapping. This patch adds a check for the num of interrupt queues at dev_start. Signed-off-by: Wang Xiao W --- drivers/net/ixgbe/ixgbe_ethdev.c | 5 +++++ drivers/net/ixgbe/ixgbe_ethdev.h | 1 + 2 files changed, 6 insertions(+) diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c index 5812d10..8961454 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.c +++ b/drivers/net/ixgbe/ixgbe_ethdev.c @@ -2131,6 +2131,11 @@ ixgbe_dev_start(struct rte_eth_dev *dev) !RTE_ETH_DEV_SRIOV(dev).active) && dev->data->dev_conf.intr_conf.rxq != 0) { intr_vector = dev->data->nb_rx_queues; + if (intr_vector > IXGBE_MAX_INTR_QUEUE_NUM) { + PMD_INIT_LOG(ERR, "At most %d intr queues supported", + IXGBE_MAX_INTR_QUEUE_NUM); + return -ENOTSUP; + } if (rte_intr_efd_enable(intr_handle, intr_vector)) return -1; } diff --git a/drivers/net/ixgbe/ixgbe_ethdev.h b/drivers/net/ixgbe/ixgbe_ethdev.h index a7b1eb5..4ff6338 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.h +++ b/drivers/net/ixgbe/ixgbe_ethdev.h @@ -59,6 +59,7 @@ #define IXGBE_VFTA_SIZE 128 #define IXGBE_VLAN_TAG_SIZE 4 #define IXGBE_MAX_RX_QUEUE_NUM 128 +#define IXGBE_MAX_INTR_QUEUE_NUM 15 #define IXGBE_VMDQ_DCB_NB_QUEUES IXGBE_MAX_RX_QUEUE_NUM #define IXGBE_DCB_NB_QUEUES IXGBE_MAX_RX_QUEUE_NUM #define IXGBE_NONE_MODE_TX_NB_QUEUES 64 -- 1.9.3