From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jingjing Wu Subject: [PATCH 16/31] net/i40e/base: use BIT() macro instead of bit fields Date: Sat, 3 Dec 2016 09:18:58 +0800 Message-ID: <1480727953-92137-17-git-send-email-jingjing.wu@intel.com> References: <1480727953-92137-1-git-send-email-jingjing.wu@intel.com> Cc: jingjing.wu@intel.com, helin.zhang@intel.com To: dev@dpdk.org Return-path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id E1414FA31 for ; Sat, 3 Dec 2016 02:20:07 +0100 (CET) In-Reply-To: <1480727953-92137-1-git-send-email-jingjing.wu@intel.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Signed-off-by: Jingjing Wu --- drivers/net/i40e/base/i40e_adminq_cmd.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h b/drivers/net/i40e/base/i40e_adminq_cmd.h index 1884758..cef02b1 100644 --- a/drivers/net/i40e/base/i40e_adminq_cmd.h +++ b/drivers/net/i40e/base/i40e_adminq_cmd.h @@ -1823,11 +1823,11 @@ struct i40e_aq_set_phy_config { /* same bits as above in all */ #define I40E_AQ_PHY_TYPE_EXT_25G_SR 0x04 #define I40E_AQ_PHY_TYPE_EXT_25G_LR 0x08 u8 fec_config; -#define I40E_AQ_SET_FEC_ABILITY_KR (1 << 0) -#define I40E_AQ_SET_FEC_ABILITY_RS (1 << 1) -#define I40E_AQ_SET_FEC_REQUEST_KR (1 << 2) -#define I40E_AQ_SET_FEC_REQUEST_RS (1 << 3) -#define I40E_AQ_SET_FEC_AUTO (1 << 4) +#define I40E_AQ_SET_FEC_ABILITY_KR BIT(0) +#define I40E_AQ_SET_FEC_ABILITY_RS BIT(1) +#define I40E_AQ_SET_FEC_REQUEST_KR BIT(2) +#define I40E_AQ_SET_FEC_REQUEST_RS BIT(3) +#define I40E_AQ_SET_FEC_AUTO BIT(4) #define I40E_AQ_PHY_FEC_CONFIG_SHIFT 0x0 #define I40E_AQ_PHY_FEC_CONFIG_MASK (0x1F << I40E_AQ_PHY_FEC_CONFIG_SHIFT) u8 reserved; -- 2.4.11