From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jerin Jacob Subject: [PATCH 17/28] net/cxgbe: use eal I/O device memory read/write API Date: Wed, 14 Dec 2016 07:25:47 +0530 Message-ID: <1481680558-4003-18-git-send-email-jerin.jacob@caviumnetworks.com> References: <1481680558-4003-1-git-send-email-jerin.jacob@caviumnetworks.com> Mime-Version: 1.0 Content-Type: text/plain Cc: , , , , , Santosh Shukla , Jerin Jacob , Rahul Lakkireddy To: Return-path: Received: from NAM03-DM3-obe.outbound.protection.outlook.com (mail-dm3nam03on0081.outbound.protection.outlook.com [104.47.41.81]) by dpdk.org (Postfix) with ESMTP id 0ADE14B79 for ; Wed, 14 Dec 2016 02:58:48 +0100 (CET) In-Reply-To: <1481680558-4003-1-git-send-email-jerin.jacob@caviumnetworks.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Santosh Shukla Replace the raw I/O device memory read/write access with eal abstraction for I/O device memory read/write access to fix portability issues across different architectures. Signed-off-by: Santosh Shukla Signed-off-by: Jerin Jacob CC: Rahul Lakkireddy --- drivers/net/cxgbe/base/adapter.h | 13 +++++++++---- drivers/net/cxgbe/cxgbe_compat.h | 3 ++- 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/net/cxgbe/base/adapter.h b/drivers/net/cxgbe/base/adapter.h index 5e3bd50..0ae4513 100644 --- a/drivers/net/cxgbe/base/adapter.h +++ b/drivers/net/cxgbe/base/adapter.h @@ -40,6 +40,7 @@ #include "cxgbe_compat.h" #include "t4_regs_values.h" +#include "rte_io.h" enum { MAX_ETH_QSETS = 64, /* # of Ethernet Tx/Rx queue sets */ @@ -324,7 +325,11 @@ struct adapter { int use_unpacked_mode; /* unpacked rx mode state */ }; -#define CXGBE_PCI_REG(reg) (*((volatile uint32_t *)(reg))) +#define CXGBE_PCI_REG(reg) ({ \ + uint32_t __val; \ + __val = rte_readl(reg); \ + __val; \ +}) static inline uint64_t cxgbe_read_addr64(volatile void *addr) { @@ -351,15 +356,15 @@ static inline uint32_t cxgbe_read_addr(volatile void *addr) cxgbe_read_addr64(CXGBE_PCI_REG_ADDR((adap), (reg))) #define CXGBE_PCI_REG_WRITE(reg, value) ({ \ - CXGBE_PCI_REG((reg)) = (value); }) + rte_writel(value, reg); }) #define CXGBE_WRITE_REG(adap, reg, value) \ CXGBE_PCI_REG_WRITE(CXGBE_PCI_REG_ADDR((adap), (reg)), (value)) static inline uint64_t cxgbe_write_addr64(volatile void *addr, uint64_t val) { - CXGBE_PCI_REG(addr) = val; - CXGBE_PCI_REG(((volatile uint8_t *)(addr) + 4)) = (val >> 32); + CXGBE_PCI_REG_WRITE(addr, val); + CXGBE_PCI_REG_WRITE(((volatile uint8_t *)(addr) + 4), (val >> 32)); return val; } diff --git a/drivers/net/cxgbe/cxgbe_compat.h b/drivers/net/cxgbe/cxgbe_compat.h index e68f8f5..95d8f27 100644 --- a/drivers/net/cxgbe/cxgbe_compat.h +++ b/drivers/net/cxgbe/cxgbe_compat.h @@ -45,6 +45,7 @@ #include #include #include +#include #define dev_printf(level, fmt, args...) \ RTE_LOG(level, PMD, "rte_cxgbe_pmd: " fmt, ## args) @@ -254,7 +255,7 @@ static inline unsigned long ilog2(unsigned long n) static inline void writel(unsigned int val, volatile void __iomem *addr) { - *(volatile unsigned int *)addr = val; + rte_writel(val, addr); } static inline void writeq(u64 val, volatile void __iomem *addr) -- 2.5.5