From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jerin Jacob Subject: [PATCH 23/28] net/ixgbe: use eal I/O device memory read/write API Date: Wed, 14 Dec 2016 07:25:53 +0530 Message-ID: <1481680558-4003-24-git-send-email-jerin.jacob@caviumnetworks.com> References: <1481680558-4003-1-git-send-email-jerin.jacob@caviumnetworks.com> Mime-Version: 1.0 Content-Type: text/plain Cc: , , , , , Santosh Shukla , Jerin Jacob , Helin Zhang To: Return-path: Received: from NAM03-DM3-obe.outbound.protection.outlook.com (mail-dm3nam03on0073.outbound.protection.outlook.com [104.47.41.73]) by dpdk.org (Postfix) with ESMTP id 7F4C25689 for ; Wed, 14 Dec 2016 02:59:09 +0100 (CET) In-Reply-To: <1481680558-4003-1-git-send-email-jerin.jacob@caviumnetworks.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Santosh Shukla Replace the raw I/O device memory read/write access with eal abstraction for I/O device memory read/write access to fix portability issues across different architectures. Signed-off-by: Santosh Shukla Signed-off-by: Jerin Jacob CC: Helin Zhang CC: Konstantin Ananyev --- drivers/net/ixgbe/base/ixgbe_osdep.h | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/net/ixgbe/base/ixgbe_osdep.h b/drivers/net/ixgbe/base/ixgbe_osdep.h index 77f0af5..9d16c21 100644 --- a/drivers/net/ixgbe/base/ixgbe_osdep.h +++ b/drivers/net/ixgbe/base/ixgbe_osdep.h @@ -44,6 +44,7 @@ #include #include #include +#include #include "../ixgbe_logs.h" #include "../ixgbe_bypass_defines.h" @@ -121,16 +122,20 @@ typedef int bool; #define prefetch(x) rte_prefetch0(x) -#define IXGBE_PCI_REG(reg) (*((volatile uint32_t *)(reg))) +#define IXGBE_PCI_REG(reg) ({ \ + uint32_t __val; \ + __val = rte_readl(reg); \ + __val; \ +}) static inline uint32_t ixgbe_read_addr(volatile void* addr) { return rte_le_to_cpu_32(IXGBE_PCI_REG(addr)); } -#define IXGBE_PCI_REG_WRITE(reg, value) do { \ - IXGBE_PCI_REG((reg)) = (rte_cpu_to_le_32(value)); \ -} while(0) +#define IXGBE_PCI_REG_WRITE(reg, value) ({ \ + rte_writel(rte_cpu_to_le_32(value), reg); \ +}) #define IXGBE_PCI_REG_ADDR(hw, reg) \ ((volatile uint32_t *)((char *)(hw)->hw_addr + (reg))) -- 2.5.5