From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jerin Jacob Subject: [PATCH v4 08/29] eal/arm64: define smp barrier definition for arm64 Date: Tue, 17 Jan 2017 12:43:43 +0530 Message-ID: <1484637244-7548-9-git-send-email-jerin.jacob@caviumnetworks.com> References: <1484212646-10338-1-git-send-email-jerin.jacob@caviumnetworks.com> <1484637244-7548-1-git-send-email-jerin.jacob@caviumnetworks.com> Mime-Version: 1.0 Content-Type: text/plain Cc: , , , , , , Jerin Jacob To: Return-path: Received: from NAM03-CO1-obe.outbound.protection.outlook.com (mail-co1nam03on0041.outbound.protection.outlook.com [104.47.40.41]) by dpdk.org (Postfix) with ESMTP id 5EF45F95A for ; Tue, 17 Jan 2017 08:15:14 +0100 (CET) In-Reply-To: <1484637244-7548-1-git-send-email-jerin.jacob@caviumnetworks.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" dmb instruction based barrier is used for smp version of memory barrier. Signed-off-by: Jerin Jacob --- lib/librte_eal/common/include/arch/arm/rte_atomic_64.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h index bc7de64..78ebea2 100644 --- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h +++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h @@ -82,11 +82,11 @@ static inline void rte_rmb(void) dsb(ld); } -#define rte_smp_mb() rte_mb() +#define rte_smp_mb() dmb(ish) -#define rte_smp_wmb() rte_wmb() +#define rte_smp_wmb() dmb(ishst) -#define rte_smp_rmb() rte_rmb() +#define rte_smp_rmb() dmb(ishld) #ifdef __cplusplus } -- 2.5.5