From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jerin Jacob Subject: [PATCH v5 01/29] eal: introduce I/O device memory barriers Date: Wed, 18 Jan 2017 06:51:14 +0530 Message-ID: <1484702502-25451-2-git-send-email-jerin.jacob@caviumnetworks.com> References: <1484637244-7548-1-git-send-email-jerin.jacob@caviumnetworks.com> <1484702502-25451-1-git-send-email-jerin.jacob@caviumnetworks.com> Mime-Version: 1.0 Content-Type: text/plain Cc: , , , , , , Jerin Jacob To: Return-path: Received: from NAM01-BY2-obe.outbound.protection.outlook.com (mail-by2nam01on0040.outbound.protection.outlook.com [104.47.34.40]) by dpdk.org (Postfix) with ESMTP id 3E20C2C06 for ; Wed, 18 Jan 2017 02:22:19 +0100 (CET) In-Reply-To: <1484702502-25451-1-git-send-email-jerin.jacob@caviumnetworks.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This commit introduce rte_io_mb(), rte_io_wmb() and rte_io_rmb(), in order to enable memory barriers between I/O device and CPU. Signed-off-by: Jerin Jacob --- lib/librte_eal/common/include/generic/rte_atomic.h | 27 ++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/lib/librte_eal/common/include/generic/rte_atomic.h b/lib/librte_eal/common/include/generic/rte_atomic.h index 43a704e..7b81705 100644 --- a/lib/librte_eal/common/include/generic/rte_atomic.h +++ b/lib/librte_eal/common/include/generic/rte_atomic.h @@ -100,6 +100,33 @@ static inline void rte_smp_wmb(void); */ static inline void rte_smp_rmb(void); +/** + * General memory barrier for I/O device + * + * Guarantees that the LOAD and STORE operations that precede the + * rte_io_mb() call are visible to I/O device or CPU before the + * LOAD and STORE operations that follow it. + */ +static inline void rte_io_mb(void); + +/** + * Write memory barrier for I/O device + * + * Guarantees that the STORE operations that precede the + * rte_io_wmb() call are visible to I/O device before the STORE + * operations that follow it. + */ +static inline void rte_io_wmb(void); + +/** + * Read memory barrier for IO device + * + * Guarantees that the LOAD operations on I/O device that precede the + * rte_io_rmb() call are visible to CPU before the LOAD + * operations that follow it. + */ +static inline void rte_io_rmb(void); + #endif /* __DOXYGEN__ */ /** -- 2.5.5