From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jerin Jacob Subject: [PATCH v5 06/29] eal/armv7: define I/O device memory barriers for ARMv7 Date: Wed, 18 Jan 2017 06:51:19 +0530 Message-ID: <1484702502-25451-7-git-send-email-jerin.jacob@caviumnetworks.com> References: <1484637244-7548-1-git-send-email-jerin.jacob@caviumnetworks.com> <1484702502-25451-1-git-send-email-jerin.jacob@caviumnetworks.com> Mime-Version: 1.0 Content-Type: text/plain Cc: , , , , , , Jerin Jacob To: Return-path: Received: from NAM01-BY2-obe.outbound.protection.outlook.com (mail-by2nam01on0075.outbound.protection.outlook.com [104.47.34.75]) by dpdk.org (Postfix) with ESMTP id 1F393377E for ; Wed, 18 Jan 2017 02:22:37 +0100 (CET) In-Reply-To: <1484702502-25451-1-git-send-email-jerin.jacob@caviumnetworks.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The patch does not provide any functional change for ARMv7. I/O barriers are mapped to existing smp barriers. CC: Jan Viktorin CC: Jianbo Liu Signed-off-by: Jerin Jacob --- lib/librte_eal/common/include/arch/arm/rte_atomic_32.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_32.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_32.h index dd627a0..14c0486 100644 --- a/lib/librte_eal/common/include/arch/arm/rte_atomic_32.h +++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_32.h @@ -73,6 +73,12 @@ extern "C" { #define rte_smp_rmb() rte_rmb() +#define rte_io_mb() rte_mb() + +#define rte_io_wmb() rte_wmb() + +#define rte_io_rmb() rte_rmb() + #ifdef __cplusplus } #endif -- 2.5.5