From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Monjalon Subject: Re: [PATCH 0/2] Added AES counter mode capability Date: Tue, 07 Jun 2016 19:04:40 +0200 Message-ID: <1492855.Hzx5BHje22@xps13> References: <1462530136-9216-1-git-send-email-arkadiuszx.kusztal@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7Bit Cc: dev@dpdk.org, "Jain, Deepak K" , "Trahe, Fiona" , "Griffin, John" To: "Kusztal, ArkadiuszX" Return-path: Received: from mail-wm0-f51.google.com (mail-wm0-f51.google.com [74.125.82.51]) by dpdk.org (Postfix) with ESMTP id 59A09A24E for ; Tue, 7 Jun 2016 19:04:43 +0200 (CEST) Received: by mail-wm0-f51.google.com with SMTP id v199so28800255wmv.0 for ; Tue, 07 Jun 2016 10:04:43 -0700 (PDT) In-Reply-To: List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > From: Kusztal, ArkadiuszX > This patchset adds AES counter mode capability for Intel QuickAssist Technology crypto driver. > It adds six test cases for 16B, 24B, 32B key size. > Series-Acked-by: Deepak Kumar JAIN Applied, thanks