From mboxrd@z Thu Jan 1 00:00:00 1970 From: Nipun Gupta Subject: [PATCH] bus/fslmc: change the eqcr stashing threshold to 1 Date: Wed, 3 Jan 2018 21:09:04 +0530 Message-ID: <1514993944-11940-1-git-send-email-nipun.gupta@nxp.com> Mime-Version: 1.0 Content-Type: text/plain Cc: , , , Nipun Gupta To: Return-path: Received: from NAM01-BY2-obe.outbound.protection.outlook.com (mail-by2nam01on0042.outbound.protection.outlook.com [104.47.34.42]) by dpdk.org (Postfix) with ESMTP id 550831B1A6 for ; Wed, 3 Jan 2018 10:23:57 +0100 (CET) List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Changing the EQCR stashing threshold boosts the performance of l3fwd application on LS2088 by more than 20% as it helps in burst packet processing at the Tx side. CPU is immediately informed about the empty EQCR entries once consumed by the hardware. Signed-off-by: Nipun Gupta --- drivers/bus/fslmc/qbman/qbman_sys.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/bus/fslmc/qbman/qbman_sys.h b/drivers/bus/fslmc/qbman/qbman_sys.h index c216e9c..d2253bd 100644 --- a/drivers/bus/fslmc/qbman/qbman_sys.h +++ b/drivers/bus/fslmc/qbman/qbman_sys.h @@ -358,7 +358,7 @@ static inline int qbman_swp_sys_init(struct qbman_swp_sys *s, reg = qbman_set_swp_cfg(dqrr_size, 0, 0, 3, 2, 3, 1, 1, 1, 1, 1, 1); else - reg = qbman_set_swp_cfg(dqrr_size, 0, 2, 3, 2, 2, 1, 1, 1, 1, + reg = qbman_set_swp_cfg(dqrr_size, 0, 1, 3, 2, 2, 1, 1, 1, 1, 1, 1); qbman_cinh_write(s, QBMAN_CINH_SWP_CFG, reg); reg = qbman_cinh_read(s, QBMAN_CINH_SWP_CFG); -- 1.9.1