From mboxrd@z Thu Jan 1 00:00:00 1970 From: xiangxia.m.yue@gmail.com Subject: [PATCH net-next v4 3/4] net/ixgbe: write disable to EITR counter Date: Fri, 27 Apr 2018 20:03:39 -0700 Message-ID: <1524884620-64598-4-git-send-email-xiangxia.m.yue@gmail.com> References: <1524884620-64598-1-git-send-email-xiangxia.m.yue@gmail.com> Cc: dev@dpdk.org, Tonghao Zhang To: qi.z.zhang@intel.com, ferruh.yigit@intel.com, helin.zhang@intel.com, beilei.xing@intel.com, wei.dai@intel.com Return-path: Received: from mail-pg0-f65.google.com (mail-pg0-f65.google.com [74.125.83.65]) by dpdk.org (Postfix) with ESMTP id 8A93D6CD8 for ; Sat, 28 Apr 2018 05:03:59 +0200 (CEST) Received: by mail-pg0-f65.google.com with SMTP id p10-v6so2821907pgn.1 for ; Fri, 27 Apr 2018 20:03:59 -0700 (PDT) In-Reply-To: <1524884620-64598-1-git-send-email-xiangxia.m.yue@gmail.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Tonghao Zhang ixgbe doesn't write the EITR counter, disable it now. Signed-off-by: Tonghao Zhang --- drivers/net/ixgbe/ixgbe_ethdev.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c index fcc10f6..07b4c1b 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.c +++ b/drivers/net/ixgbe/ixgbe_ethdev.c @@ -5876,7 +5876,8 @@ static void ixgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on) break; } IXGBE_WRITE_REG(hw, IXGBE_EITR(IXGBE_MISC_VEC_ID), - IXGBE_EITR_INTERVAL_US(IXGBE_QUEUE_ITR_INTERVAL_DEFAULT)); + IXGBE_EITR_INTERVAL_US(IXGBE_QUEUE_ITR_INTERVAL_DEFAULT) + | IXGBE_EITR_CNT_WDIS); /* set up to autoclear timer, and the vectors */ mask = IXGBE_EIMS_ENABLE_MASK; -- 1.8.3.1