From mboxrd@z Thu Jan 1 00:00:00 1970 From: Wei Zhao Subject: [PATCH v3] net/ixgbe: fix mask bits register set error for FDIR Date: Fri, 15 Jun 2018 10:30:50 +0800 Message-ID: <1529029850-56080-1-git-send-email-wei.zhao1@intel.com> References: <1528960893-18630-1-git-send-email-wei.zhao1@intel.com> Cc: wenzhuo.lu@intel.com, stable@dpdk.org, Wei Zhao To: dev@dpdk.org Return-path: In-Reply-To: <1528960893-18630-1-git-send-email-wei.zhao1@intel.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" MAC address bits in mask registers should be set to zero when the is mac mask is 0xFF, otherwise if it is 0x0 these bits should be to 0x3F. Fixes: 82fb702077f6 ("ixgbe: support new flow director modes for X550") Signed-off-by: Wei Zhao --- v2: -change mask bits set method to support more mac mask. v3: -change mask and with 0x3F to macro definition. --- drivers/net/ixgbe/ixgbe_fdir.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_fdir.c b/drivers/net/ixgbe/ixgbe_fdir.c index 6baf825..aebe4c6 100644 --- a/drivers/net/ixgbe/ixgbe_fdir.c +++ b/drivers/net/ixgbe/ixgbe_fdir.c @@ -394,9 +394,11 @@ fdir_set_input_mask_x550(struct rte_eth_dev *dev) IXGBE_FDIRIP6M_TNI_VNI; if (mode == RTE_FDIR_MODE_PERFECT_TUNNEL) { - mac_mask = info->mask.mac_addr_byte_mask; - fdiripv6m |= (mac_mask << IXGBE_FDIRIP6M_INNER_MAC_SHIFT) - & IXGBE_FDIRIP6M_INNER_MAC; + mac_mask = info->mask.mac_addr_byte_mask & + (IXGBE_FDIRIP6M_INNER_MAC >> + IXGBE_FDIRIP6M_INNER_MAC_SHIFT); + fdiripv6m &= ~((mac_mask << IXGBE_FDIRIP6M_INNER_MAC_SHIFT) & + IXGBE_FDIRIP6M_INNER_MAC); switch (info->mask.tunnel_type_mask) { case 0: -- 2.7.5