From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tom Barbette Subject: Re: MLX5 should define the timestamp field in the doc Date: Wed, 5 Sep 2018 07:11:16 +0000 Message-ID: <1536131476329.46769@kth.se> References: <1536071162684.44442@kth.se>, Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Cc: Yongseok Koh , "john.mcnamara@intel.com" , "marko.kovacevic@intel.com" To: Shahaf Shuler , "dev@dpdk.org" Return-path: Received: from smtp-3.sys.kth.se (smtp-3.sys.kth.se [130.237.48.192]) by dpdk.org (Postfix) with ESMTP id BE2F41559 for ; Wed, 5 Sep 2018 09:11:22 +0200 (CEST) In-Reply-To: Content-Language: fr-FR List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Thanks for your answer Shahaf ! We're trying to measure the latency of packets going through various servic= e chains inside individual "server". Eg. we can see that on Server 1, the = latency for the service chain handling HTTP packets is ~800ns (+ max and mi= ns, tail latency, etc). What we do now is to timestamp packets right after = they are received, and compute the difference with the timestamp just befor= e they are sent. Over a cluster this shows us where the latency is happenin= g. We would like this "box" latency to include the time spent in queues, and f= or that the hardware timestamp seems fit-for-purpose as it would timestamp = the packets before the software queues. Moreover, as we use batching, we lo= se a lot of precision as we timestamp a whole batch at once. I'm pretty sure this use case is of interest for many others. Tail latency = is of the essence nowadays, and finding where packets get delayed precisely= is important. ? Instead of converting the timestamp to real time, in this very use case it = seems the Mellanox card could actually be our unique source of time, we jus= t need to be able to convert ticks to seconds. Any chance we can run an equivalent of mlx5_read_internal_timer (https://el= ixir.bootlin.com/linux/v4.18.5/source/drivers/net/ethernet/mellanox/mlx5/co= re/main.c#L623) ?from userspace ? Are these registers also mapped, or can b= e done so with a few changes? With only that we can actually derive the fre= quency and the offset easily.? Tom