From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Mody, Rasesh" Subject: [PATCH 16/18] net/qede/base: add APIs for dscp priority map configuration Date: Sat, 29 Sep 2018 08:14:37 +0000 Message-ID: <1538208822-9726-17-git-send-email-rasesh.mody@cavium.com> References: <1538208822-9726-1-git-send-email-rasesh.mody@cavium.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Cc: "Mody, Rasesh" , "ferruh.yigit@intel.com" , Dept-Eng DPDK Dev To: "dev@dpdk.org" Return-path: Received: from NAM02-CY1-obe.outbound.protection.outlook.com (mail-cys01nam02on0088.outbound.protection.outlook.com [104.47.37.88]) by dpdk.org (Postfix) with ESMTP id 4C20A5F51 for ; Sat, 29 Sep 2018 10:14:40 +0200 (CEST) In-Reply-To: <1538208822-9726-1-git-send-email-rasesh.mody@cavium.com> Content-Language: en-US List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add APIs for dscp priority map configuration. APIs added are ecore_dcbx_get_dscp_priority(), ecore_dcbx_set_dscp_priority(). These base driver APIs can be used for dscp-map query/config. Configure the doorbell queue (DORQ) to use vlan-id/priority. Signed-off-by: Rasesh Mody --- drivers/net/qede/base/ecore_dcbx.c | 85 +++++++++++++++++++++++++++-= ---- drivers/net/qede/base/ecore_dcbx_api.h | 10 ++++ drivers/net/qede/base/reg_addr.h | 1 + 3 files changed, 85 insertions(+), 11 deletions(-) diff --git a/drivers/net/qede/base/ecore_dcbx.c b/drivers/net/qede/base/eco= re_dcbx.c index 7668ad6..7981c42 100644 --- a/drivers/net/qede/base/ecore_dcbx.c +++ b/drivers/net/qede/base/ecore_dcbx.c @@ -129,7 +129,7 @@ u8 ecore_dcbx_get_dscp_value(struct ecore_hwfn *p_hwfn,= u8 pri) =20 static void ecore_dcbx_set_params(struct ecore_dcbx_results *p_data, - struct ecore_hwfn *p_hwfn, + struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, bool enable, u8 prio, u8 tc, enum dcbx_protocol_type type, enum ecore_pci_personality personality) @@ -154,12 +154,19 @@ u8 ecore_dcbx_get_dscp_value(struct ecore_hwfn *p_hwf= n, u8 pri) /* QM reconf data */ if (p_hwfn->hw_info.personality =3D=3D personality) p_hwfn->hw_info.offload_tc =3D tc; + + /* Configure dcbx vlan priority in doorbell block for roce EDPM */ + if (OSAL_TEST_BIT(ECORE_MF_UFP_SPECIFIC, &p_hwfn->p_dev->mf_bits) && + (type =3D=3D DCBX_PROTOCOL_ROCE)) { + ecore_wr(p_hwfn, p_ptt, DORQ_REG_TAG1_OVRD_MODE, 1); + ecore_wr(p_hwfn, p_ptt, DORQ_REG_PF_PCP_BB_K2, prio << 1); + } } =20 /* Update app protocol data and hw_info fields with the TLV info */ static void ecore_dcbx_update_app_info(struct ecore_dcbx_results *p_data, - struct ecore_hwfn *p_hwfn, + struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, bool enable, u8 prio, u8 tc, enum dcbx_protocol_type type) { @@ -175,7 +182,7 @@ u8 ecore_dcbx_get_dscp_value(struct ecore_hwfn *p_hwfn,= u8 pri) =20 personality =3D ecore_dcbx_app_update[i].personality; =20 - ecore_dcbx_set_params(p_data, p_hwfn, enable, + ecore_dcbx_set_params(p_data, p_hwfn, p_ptt, enable, prio, tc, type, personality); } } @@ -231,7 +238,7 @@ u8 ecore_dcbx_get_dscp_value(struct ecore_hwfn *p_hwfn,= u8 pri) * reconfiguring QM. Get protocol specific data for PF update ramrod comma= nd. */ static enum _ecore_status_t -ecore_dcbx_process_tlv(struct ecore_hwfn *p_hwfn, +ecore_dcbx_process_tlv(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, struct ecore_dcbx_results *p_data, struct dcbx_app_priority_entry *p_tbl, u32 pri_tc_tbl, int count, u8 dcbx_version) @@ -280,8 +287,8 @@ u8 ecore_dcbx_get_dscp_value(struct ecore_hwfn *p_hwfn,= u8 pri) enable =3D true; } =20 - ecore_dcbx_update_app_info(p_data, p_hwfn, enable, - priority, tc, type); + ecore_dcbx_update_app_info(p_data, p_hwfn, p_ptt, + enable, priority, tc, type); } } =20 @@ -302,8 +309,8 @@ u8 ecore_dcbx_get_dscp_value(struct ecore_hwfn *p_hwfn,= u8 pri) if (p_data->arr[type].update) continue; =20 - enable =3D (type =3D=3D DCBX_PROTOCOL_ETH) ? false : !!dcbx_version; - ecore_dcbx_update_app_info(p_data, p_hwfn, enable, + /* if no app tlv was present, don't override in FW */ + ecore_dcbx_update_app_info(p_data, p_hwfn, p_ptt, false, priority, tc, type); } =20 @@ -314,7 +321,7 @@ u8 ecore_dcbx_get_dscp_value(struct ecore_hwfn *p_hwfn,= u8 pri) * reconfiguring QM. Get protocol specific data for PF update ramrod comma= nd. */ static enum _ecore_status_t -ecore_dcbx_process_mib_info(struct ecore_hwfn *p_hwfn) +ecore_dcbx_process_mib_info(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p= _ptt) { struct dcbx_app_priority_feature *p_app; struct dcbx_app_priority_entry *p_tbl; @@ -338,7 +345,7 @@ u8 ecore_dcbx_get_dscp_value(struct ecore_hwfn *p_hwfn,= u8 pri) p_info =3D &p_hwfn->hw_info; num_entries =3D GET_MFW_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES); =20 - rc =3D ecore_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl, + rc =3D ecore_dcbx_process_tlv(p_hwfn, p_ptt, &data, p_tbl, pri_tc_tbl, num_entries, dcbx_version); if (rc !=3D ECORE_SUCCESS) return rc; @@ -879,7 +886,7 @@ enum _ecore_status_t if (type =3D=3D ECORE_DCBX_OPERATIONAL_MIB) { ecore_dcbx_get_dscp_params(p_hwfn, &p_hwfn->p_dcbx_info->get); =20 - rc =3D ecore_dcbx_process_mib_info(p_hwfn); + rc =3D ecore_dcbx_process_mib_info(p_hwfn, p_ptt); if (!rc) { /* reconfigure tcs of QM queues according * to negotiation results @@ -1540,3 +1547,59 @@ enum _ecore_status_t =20 return rc; } + +enum _ecore_status_t +ecore_dcbx_get_dscp_priority(struct ecore_hwfn *p_hwfn, + u8 dscp_index, u8 *p_dscp_pri) +{ + struct ecore_dcbx_get *p_dcbx_info; + enum _ecore_status_t rc; + + if (dscp_index >=3D ECORE_DCBX_DSCP_SIZE) { + DP_ERR(p_hwfn, "Invalid dscp index %d\n", dscp_index); + return ECORE_INVAL; + } + + p_dcbx_info =3D OSAL_ALLOC(p_hwfn->p_dev, GFP_KERNEL, + sizeof(*p_dcbx_info)); + if (!p_dcbx_info) + return ECORE_NOMEM; + + OSAL_MEMSET(p_dcbx_info, 0, sizeof(*p_dcbx_info)); + rc =3D ecore_dcbx_query_params(p_hwfn, p_dcbx_info, + ECORE_DCBX_OPERATIONAL_MIB); + if (rc) { + OSAL_FREE(p_hwfn->p_dev, p_dcbx_info); + return rc; + } + + *p_dscp_pri =3D p_dcbx_info->dscp.dscp_pri_map[dscp_index]; + OSAL_FREE(p_hwfn->p_dev, p_dcbx_info); + + return ECORE_SUCCESS; +} + +enum _ecore_status_t +ecore_dcbx_set_dscp_priority(struct ecore_hwfn *p_hwfn, struct ecore_ptt *= p_ptt, + u8 dscp_index, u8 pri_val) +{ + struct ecore_dcbx_set dcbx_set; + enum _ecore_status_t rc; + + if (dscp_index >=3D ECORE_DCBX_DSCP_SIZE || + pri_val >=3D ECORE_MAX_PFC_PRIORITIES) { + DP_ERR(p_hwfn, "Invalid dscp params: index =3D %d pri =3D %d\n", + dscp_index, pri_val); + return ECORE_INVAL; + } + + OSAL_MEMSET(&dcbx_set, 0, sizeof(dcbx_set)); + rc =3D ecore_dcbx_get_config_params(p_hwfn, &dcbx_set); + if (rc) + return rc; + + dcbx_set.override_flags =3D ECORE_DCBX_OVERRIDE_DSCP_CFG; + dcbx_set.dscp.dscp_pri_map[dscp_index] =3D pri_val; + + return ecore_dcbx_config_params(p_hwfn, p_ptt, &dcbx_set, 1); +} diff --git a/drivers/net/qede/base/ecore_dcbx_api.h b/drivers/net/qede/base= /ecore_dcbx_api.h index eaf8e08..6fad2ec 100644 --- a/drivers/net/qede/base/ecore_dcbx_api.h +++ b/drivers/net/qede/base/ecore_dcbx_api.h @@ -228,6 +228,16 @@ enum _ecore_status_t ecore_lldp_set_system_tlvs(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_= ptt, struct ecore_lldp_sys_tlvs *p_params); =20 +/* Returns priority value for a given dscp index */ +enum _ecore_status_t +ecore_dcbx_get_dscp_priority(struct ecore_hwfn *p_hwfn, + u8 dscp_index, u8 *p_dscp_pri); + +/* Sets priority value for a given dscp index */ +enum _ecore_status_t +ecore_dcbx_set_dscp_priority(struct ecore_hwfn *p_hwfn, struct ecore_ptt *= p_ptt, + u8 dscp_index, u8 pri_val); + static const struct ecore_dcbx_app_metadata ecore_dcbx_app_update[] =3D { {DCBX_PROTOCOL_ISCSI, "ISCSI", ECORE_PCI_ISCSI}, {DCBX_PROTOCOL_FCOE, "FCOE", ECORE_PCI_FCOE}, diff --git a/drivers/net/qede/base/reg_addr.h b/drivers/net/qede/base/reg_a= ddr.h index 612337f..be59f77 100644 --- a/drivers/net/qede/base/reg_addr.h +++ b/drivers/net/qede/base/reg_addr.h @@ -1233,6 +1233,7 @@ #define NIG_REG_LLH_FUNC_TAG_EN 0x5019b0UL #define NIG_REG_LLH_FUNC_TAG_VALUE 0x5019d0UL #define DORQ_REG_TAG1_OVRD_MODE 0x1008b4UL +#define DORQ_REG_PF_PCP_BB_K2 0x1008c4UL #define DORQ_REG_PF_EXT_VID_BB_K2 0x1008c8UL #define PRS_REG_SEARCH_NON_IP_AS_GFT 0x1f11c0UL #define NIG_REG_LLH_PPFID2PFID_TBL_0 0x501970UL --=20 1.7.10.3