From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7A228CA9EA0 for ; Wed, 23 Oct 2019 02:56:14 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id 1A1742086D for ; Wed, 23 Oct 2019 02:56:13 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1A1742086D Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B35A31BF15; Wed, 23 Oct 2019 04:55:47 +0200 (CEST) Received: from foss.arm.com (unknown [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id 344AB1BEF6 for ; Wed, 23 Oct 2019 04:55:42 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E7AAA1682; Tue, 22 Oct 2019 19:55:41 -0700 (PDT) Received: from net-arm-thunderx2-01.test.ast.arm.com (net-arm-thunderx2-01.shanghai.arm.com [10.169.40.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 339AE3F6C4; Tue, 22 Oct 2019 19:55:37 -0700 (PDT) From: Joyce Kong To: dev@dpdk.org Cc: nd@arm.com, thomas@monjalon.net, jerinj@marvell.com, stephen@networkplumber.org, mb@smartsharesystems.com, honnappa.nagarahalli@arm.com, gavin.hu@arm.com, ravi1.kumar@amd.com, rmody@marvell.com, shshaikh@marvell.com, xuanziyang2@huawei.com, cloud.wangxiaoyun@huawei.com, zhouguoyang@huawei.com Date: Wed, 23 Oct 2019 10:54:58 +0800 Message-Id: <1571799298-18873-7-git-send-email-joyce.kong@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1571799298-18873-1-git-send-email-joyce.kong@arm.com> References: <1571799298-18873-1-git-send-email-joyce.kong@arm.com> In-Reply-To: <1571125801-45773-1-git-send-email-joyce.kong@arm.com> References: <1571125801-45773-1-git-send-email-joyce.kong@arm.com> Subject: [dpdk-dev] [PATCH v2 6/6] net/qede: use common rte bit operation APIs instead X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Remove its own bit operation APIs and use the common one, this can reduce the code duplication largely. Signed-off-by: Joyce Kong Reviewed-by: Gavin Hu --- drivers/net/qede/base/bcm_osal.c | 20 -------------------- drivers/net/qede/base/bcm_osal.h | 10 ++++------ 2 files changed, 4 insertions(+), 26 deletions(-) diff --git a/drivers/net/qede/base/bcm_osal.c b/drivers/net/qede/base/bcm_osal.c index 9915df4..665833c 100644 --- a/drivers/net/qede/base/bcm_osal.c +++ b/drivers/net/qede/base/bcm_osal.c @@ -45,26 +45,6 @@ u32 qede_osal_log2(u32 val) return log; } -inline void qede_set_bit(u32 nr, unsigned long *addr) -{ - __sync_fetch_and_or(addr, (1UL << nr)); -} - -inline void qede_clr_bit(u32 nr, unsigned long *addr) -{ - __sync_fetch_and_and(addr, ~(1UL << nr)); -} - -inline bool qede_test_bit(u32 nr, unsigned long *addr) -{ - bool res; - - rte_mb(); - res = ((*addr) & (1UL << nr)) != 0; - rte_mb(); - return res; -} - static inline u32 qede_ffb(unsigned long word) { unsigned long first_bit; diff --git a/drivers/net/qede/base/bcm_osal.h b/drivers/net/qede/base/bcm_osal.h index 51edc41..d6107c3 100644 --- a/drivers/net/qede/base/bcm_osal.h +++ b/drivers/net/qede/base/bcm_osal.h @@ -8,6 +8,7 @@ #define __BCM_OSAL_H #include +#include #include #include #include @@ -311,17 +312,14 @@ typedef struct osal_list_t { #define OSAL_BITS_PER_UL_MASK (OSAL_BITS_PER_UL - 1) /* Bitops */ -void qede_set_bit(u32, unsigned long *); #define OSAL_SET_BIT(bit, bitmap) \ - qede_set_bit(bit, bitmap) + rte_io_set_bit(bit, bitmap) -void qede_clr_bit(u32, unsigned long *); #define OSAL_CLEAR_BIT(bit, bitmap) \ - qede_clr_bit(bit, bitmap) + rte_io_clear_bit(bit, bitmap) -bool qede_test_bit(u32, unsigned long *); #define OSAL_TEST_BIT(bit, bitmap) \ - qede_test_bit(bit, bitmap) + rte_io_test_bit(bit, bitmap) u32 qede_find_first_bit(unsigned long *, u32); #define OSAL_FIND_FIRST_BIT(bitmap, length) \ -- 2.7.4