From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9DBC6C433DF for ; Tue, 20 Oct 2020 03:02:38 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id 1F1FD223BF for ; Tue, 20 Oct 2020 03:02:37 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1F1FD223BF Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nvidia.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 35C87AFD1; Tue, 20 Oct 2020 05:02:36 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 6B749AD78 for ; Tue, 20 Oct 2020 05:02:34 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from suanmingm@nvidia.com) with SMTP; 20 Oct 2020 06:02:32 +0300 Received: from nvidia.com (mtbc-r640-04.mtbc.labs.mlnx [10.75.70.9]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 09K32V2m009619 for ; Tue, 20 Oct 2020 06:02:31 +0300 From: Suanming Mou To: Cc: dev@dpdk.org Date: Tue, 20 Oct 2020 11:02:20 +0800 Message-Id: <1603162949-150001-1-git-send-email-suanmingm@nvidia.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1601984333-304464-1-git-send-email-suanmingm@nvidia.com> References: <1601984333-304464-1-git-send-email-suanmingm@nvidia.com> Subject: [dpdk-dev] [PATCH v2 0/8] net/mlx5: make counter thread safe X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The mlx5 PMD is going to support multiple-thread flow operations. This patchset makes the counter action to be thread safe. Suanming Mou (8): net/mlx5: locate aging pools in the general container net/mlx5: optimize shared counter memory net/mlx5: remove single counter container net/mlx5: synchronize flow counter pool creation net/mlx5: make three level table thread safe net/mlx5: make shared counters thread safe net/mlx5: rename flow counter macro net/mlx5: optimize counter extend memory -- v2: - Optimize the fallback non-batch counter memory. - Add MLX5_ prefix to counter macro. - Rebase on top of the latest code. -- drivers/net/mlx5/linux/mlx5_os.c | 53 ++- drivers/net/mlx5/mlx5.c | 51 ++- drivers/net/mlx5/mlx5.h | 146 ++++---- drivers/net/mlx5/mlx5_flow.c | 183 ++++++---- drivers/net/mlx5/mlx5_flow.h | 1 + drivers/net/mlx5/mlx5_flow_dv.c | 706 ++++++++++++++----------------------- drivers/net/mlx5/mlx5_flow_verbs.c | 130 ++++--- drivers/net/mlx5/mlx5_utils.c | 191 ++++++++-- drivers/net/mlx5/mlx5_utils.h | 81 ++++- 9 files changed, 824 insertions(+), 718 deletions(-) -- 1.8.3.1