From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 28C3CC43460 for ; Fri, 9 Apr 2021 10:16:31 +0000 (UTC) Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by mail.kernel.org (Postfix) with ESMTP id BAB83610A7 for ; Fri, 9 Apr 2021 10:16:30 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BAB83610A7 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D0160140FB9; Fri, 9 Apr 2021 12:15:57 +0200 (CEST) Received: from szxga05-in.huawei.com (szxga05-in.huawei.com [45.249.212.191]) by mails.dpdk.org (Postfix) with ESMTP id 86D13140F77 for ; Fri, 9 Apr 2021 12:15:52 +0200 (CEST) Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.59]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4FGv9G5sRWzvRpQ for ; Fri, 9 Apr 2021 18:13:38 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.498.0; Fri, 9 Apr 2021 18:15:45 +0800 From: "Min Hu (Connor)" To: CC: Date: Fri, 9 Apr 2021 18:16:04 +0800 Message-ID: <1617963365-41299-7-git-send-email-humin29@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1617963365-41299-1-git-send-email-humin29@huawei.com> References: <1617963365-41299-1-git-send-email-humin29@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected Subject: [dpdk-dev] [PATCH 6/7] net/hns3: fix queue state when concurrent with reset X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Chengchang Tang At the end of the reset, the state of queues need to be restored according to the states saved in the driver. If the start and stop operations of the queues are concurrent at this time, it may cause the final status to be uncertain. This patch requires queues to acquire the hw lock before starting and stopping. If the device is being restored due to reset at this time, it will block until the reset is completed. Fixes: fa29fe45a7b4 ("net/hns3: support queue start and stop") Cc: stable@dpdk.org Signed-off-by: Chengchang Tang Signed-off-by: Min Hu (Connor) --- drivers/net/hns3/hns3_rxtx.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c index be93618..b45afcd 100644 --- a/drivers/net/hns3/hns3_rxtx.c +++ b/drivers/net/hns3/hns3_rxtx.c @@ -4270,10 +4270,12 @@ hns3_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id) if (!hns3_dev_indep_txrx_supported(hw)) return -ENOTSUP; + rte_spinlock_lock(&hw->lock); ret = hns3_reset_queue(hw, rx_queue_id, HNS3_RING_TYPE_RX); if (ret) { hns3_err(hw, "fail to reset Rx queue %u, ret = %d.", rx_queue_id, ret); + rte_spinlock_unlock(&hw->lock); return ret; } @@ -4281,11 +4283,13 @@ hns3_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id) if (ret) { hns3_err(hw, "fail to init Rx queue %u, ret = %d.", rx_queue_id, ret); + rte_spinlock_unlock(&hw->lock); return ret; } hns3_enable_rxq(rxq, true); dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED; + rte_spinlock_unlock(&hw->lock); return ret; } @@ -4312,12 +4316,14 @@ hns3_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id) if (!hns3_dev_indep_txrx_supported(hw)) return -ENOTSUP; + rte_spinlock_lock(&hw->lock); hns3_enable_rxq(rxq, false); hns3_rx_queue_release_mbufs(rxq); hns3_reset_sw_rxq(rxq); dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED; + rte_spinlock_unlock(&hw->lock); return 0; } @@ -4332,16 +4338,19 @@ hns3_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id) if (!hns3_dev_indep_txrx_supported(hw)) return -ENOTSUP; + rte_spinlock_lock(&hw->lock); ret = hns3_reset_queue(hw, tx_queue_id, HNS3_RING_TYPE_TX); if (ret) { hns3_err(hw, "fail to reset Tx queue %u, ret = %d.", tx_queue_id, ret); + rte_spinlock_unlock(&hw->lock); return ret; } hns3_init_txq(txq); hns3_enable_txq(txq, true); dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED; + rte_spinlock_unlock(&hw->lock); return ret; } @@ -4355,6 +4364,7 @@ hns3_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id) if (!hns3_dev_indep_txrx_supported(hw)) return -ENOTSUP; + rte_spinlock_lock(&hw->lock); hns3_enable_txq(txq, false); hns3_tx_queue_release_mbufs(txq); /* @@ -4366,6 +4376,7 @@ hns3_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id) */ hns3_init_txq(txq); dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED; + rte_spinlock_unlock(&hw->lock); return 0; } -- 2.7.4