From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Monjalon Subject: Re: [PATCH v4 0/9] introduce coherent I/O memory barriers Date: Sun, 28 Jan 2018 08:32:14 +0100 Message-ID: <1630418.Wd0Y6PPR5S@xps> References: <20180119004430.15305-1-yskoh@mellanox.com> <20180125210250.38233-1-yskoh@mellanox.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7Bit Cc: dev@dpdk.org, adrien.mazarguil@6wind.com, nelio.laranjeiro@6wind.com, bruce.richardson@intel.com, konstantin.ananyev@intel.com, chaozhu@linux.vnet.ibm.com, jerin.jacob@caviumnetworks.com, jianbo.liu@arm.com, arybchenko@solarflare.com, shahafs@mellanox.com To: Yongseok Koh Return-path: Received: from out3-smtp.messagingengine.com (out3-smtp.messagingengine.com [66.111.4.27]) by dpdk.org (Postfix) with ESMTP id 35F6E727A for ; Sun, 28 Jan 2018 08:33:04 +0100 (CET) In-Reply-To: <20180125210250.38233-1-yskoh@mellanox.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" 25/01/2018 22:02, Yongseok Koh: > This patchset is to introduce coherent I/O memory barriers, which could be more > efficient for coherent memory between I/O device and CPU, especially for ARMv8. > > v4: > * rename barriers to "coherent I/O memory barrier". > * Make groups for various barriers in Doxygen doc. > > v3: > * add more detailed comments about the new memory barriers. > > v2: > * introduce DMA memory barriers. > > Yongseok Koh (9): > eal: add Doxygen grouping for memory barriers > eal: introduce coherent I/O memory barriers > eal/x86: define coherent I/O memory barriers > eal/ppc64: define coherent I/O memory barriers > eal/armv7: define coherent I/O memory barriers > eal/arm64: define coherent I/O memory barriers > net/mlx5: remove unnecessary memory barrier > net/mlx5: replace I/O memory barrier with coherent version > net/mlx5: fix synchronization on polling Rx completions Applied, thanks