From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Monjalon Subject: Re: [PATCH v8 0/3] generic spinlock optimization and test case enhancements Date: Thu, 28 Mar 2019 08:47:22 +0100 Message-ID: <1652821.Um39iZ3L5g@xps> References: <20181220104246.5590-1-gavin.hu@arm.com> <1552031797-146710-1-git-send-email-gavin.hu@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7Bit Cc: dev@dpdk.org, nd@arm.com, jerinj@marvell.com, hemant.agrawal@nxp.com, nipun.gupta@nxp.com, Honnappa.Nagarahalli@arm.com, i.maximets@samsung.com, chaozhu@linux.vnet.ibm.com To: Gavin Hu Return-path: Received: from out1-smtp.messagingengine.com (out1-smtp.messagingengine.com [66.111.4.25]) by dpdk.org (Postfix) with ESMTP id 8E5D75B3C for ; Thu, 28 Mar 2019 08:47:28 +0100 (CET) In-Reply-To: <1552031797-146710-1-git-send-email-gavin.hu@arm.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > Gavin Hu (3): > test/spinlock: remove 1us delay for correct benchmarking > test/spinlock: amortize the cost of getting time > spinlock: reimplement with atomic one-way barrier builtins Applied, thanks