From: Konstantin Ananyev <konstantin.ananyev@huawei.com>
To: Sun Yuechi <sunyuechi@iscas.ac.cn>, "dev@dpdk.org" <dev@dpdk.org>
Cc: Zijian <zijian.oerv@isrc.iscas.ac.cn>,
"Stanisław Kardach" <stanislaw.kardach@gmail.com>,
"Bruce Richardson" <bruce.richardson@intel.com>
Subject: RE: [PATCH v2] acl: add RISC-V vector extension implementation
Date: Tue, 30 Dec 2025 15:22:28 +0000 [thread overview]
Message-ID: <16712ed73b254bff9795e71a727ff99a@huawei.com> (raw)
In-Reply-To: <20251229054559.2923969-1-sunyuechi@iscas.ac.cn>
> Implement ACL classify function for RISC-V architecture
> using RISC-V Vector Extension instruction set.
>
> Signed-off-by: Sun Yuechi <sunyuechi@iscas.ac.cn>
> Signed-off-by: Zijian <zijian.oerv@isrc.iscas.ac.cn>
> ---
> app/test-acl/main.c | 4 +
> app/test/test_acl.c | 1 +
> config/riscv/meson.build | 1 +
> examples/l3fwd/l3fwd_acl.c | 4 +
> lib/acl/acl.h | 4 +
> lib/acl/acl_run.h | 2 +
> lib/acl/acl_run_rvv.c | 18 ++
> lib/acl/acl_run_rvv.h | 326 +++++++++++++++++++++++++++++++
> lib/acl/meson.build | 2 +
> lib/acl/rte_acl.c | 34 ++++
> lib/acl/rte_acl.h | 1 +
> lib/eal/riscv/include/rte_vect.h | 2 +-
> 12 files changed, 398 insertions(+), 1 deletion(-)
> create mode 100644 lib/acl/acl_run_rvv.c
> create mode 100644 lib/acl/acl_run_rvv.h
>
Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>
One more thing, that I nearly fogot:
As it is a new feature, it is probably worth to add a new entry into Release Notes.
If you'll decide to go ahead with that - pls keep my Ack.
Konstantin
> --
> 2.52.0
>
prev parent reply other threads:[~2025-12-30 15:22 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-29 5:45 [PATCH v2] acl: add RISC-V vector extension implementation Sun Yuechi
2025-12-30 15:22 ` Konstantin Ananyev [this message]
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