From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Monjalon Subject: Re: [PATCH v2] mbuf: fix 64bit address alignment in 32-bit builds Date: Sun, 30 Apr 2017 21:40:01 +0200 Message-ID: <1926047.JUkAzgJ2Ac@xps> References: <20170428081551.28954-1-bruce.richardson@intel.com> <20170428131014.5137-1-bruce.richardson@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7Bit Cc: dev@dpdk.org To: Bruce Richardson Return-path: Received: from out4-smtp.messagingengine.com (out4-smtp.messagingengine.com [66.111.4.28]) by dpdk.org (Postfix) with ESMTP id 01CF76DB2 for ; Sun, 30 Apr 2017 21:40:03 +0200 (CEST) In-Reply-To: <20170428131014.5137-1-bruce.richardson@intel.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" 28/04/2017 15:10, Bruce Richardson: > On i686 builds, the uin64_t type is 64-bits in size but is aligned to > 32-bits only. This causes mbuf fields for rearm_data to not be 16-byte > aligned on 32-bit builds, which causes errors with some vector PMDs which > expect the rearm data to be aligned as on 64-bit. > > Given that we cannot use the extra space in the data structures anyway, as > it's already used on 64-bit builds, we can just force alignment of the > physical address in the mbuf to 8-bytes in all cases. This has no effect on > 64-bit systems, but fixes the updated PMDs on 32-bit. > > Fixes: f4356d7ca168 ("net/i40e: eliminate mbuf write on rearm") > Fixes: f160666a1073 ("net/ixgbe: eliminate mbuf write on rearm") > > Signed-off-by: Bruce Richardson > --- > v2: change alignment fix from being for all phys_addr_t vars to just > the one in the mbuf structure. This is a lower risk fix. Additional > patches promised to put in build-checks for alignment in vpmds will > be sent separately. Applied, thanks