From mboxrd@z Thu Jan  1 00:00:00 1970
From: Thomas Monjalon <thomas.monjalon-pdR9zngts4EAvxtiuMwx3w@public.gmane.org>
Subject: Re: [PATCH] Fix KNI compiling issue on IBM Power
Date: Thu, 04 Dec 2014 12:59:31 +0100
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To: Chao Zhu <chaozhu-23VcF4HTsmIX0ybBhKVfKdBPR1lH4CV8@public.gmane.org>
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> Because of different cache line size, the alignment of struct
> rte_kni_mbuf in rte_kni_common.h doesn't work on IBM Power. This patch
> changed from 64 to RTE_CACHE_LINE_SIZE micro to do the alignment.
> 
> Signed-off-by: Chao Zhu <chaozhu-23VcF4HTsmIX0ybBhKVfKdBPR1lH4CV8@public.gmane.org>

Acked-by: Thomas Monjalon <thomas.monjalon-pdR9zngts4EAvxtiuMwx3w@public.gmane.org>

Applied

I wonder if we could try to guess the cache line size instead of
configuring it in many places.
Maybe we could use something like sysconf(_SC_LEVEL1_DCACHE_LINESIZE)?

Thanks
-- 
Thomas