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From: Raslan Darawsheh <rasland@nvidia.com>
To: Dariusz Sosnowski <dsosnowski@nvidia.com>,
	Viacheslav Ovsiienko <viacheslavo@nvidia.com>,
	Bing Zhao <bingz@nvidia.com>, Ori Kam <orika@nvidia.com>,
	Suanming Mou <suanmingm@nvidia.com>,
	Matan Azrad <matan@nvidia.com>
Cc: dev@dpdk.org, Xiaoyu Min <jackmin@nvidia.com>,
	stable@dpdk.org, Mohand Alrasheed <mrasheed@wirefilter.com>
Subject: Re: [PATCH] net/mlx5: fix HW flow counter query
Date: Thu, 5 Feb 2026 18:01:28 +0200	[thread overview]
Message-ID: <1a5a2315-2c3d-4329-bc82-7faab1406af3@nvidia.com> (raw)
In-Reply-To: <20260112172324.1523241-1-dsosnowski@nvidia.com>

Hi,


On 12/01/2026 7:23 PM, Dariusz Sosnowski wrote:
> From: Xiaoyu Min <jackmin@nvidia.com>
> 
> There are a couple of issues in the logic used by
> counter service thread to refresh flow counter values
> in HW Steering mode:
> 
> 1. Flow counter offset in bulk is not taken into account
>     correctly during query.
> 2. Number of WQEs used up during query is not tracked correctly.
> 
> Regarding the 1st issue, HW flow counters are queried by posting WQEs.
> Each WQE queries 4 flow counters at once.
> Flow counters are addressed by base ID (ASO object ID)
> and offset (divided by 4).
> During periodic counter refresh, mlx5 PMD fills whole queue with WQEs
> and waits for query completion. This is repeated until all known
> counters are refreshed.
> 
> The issue is that, between different iterations the base offset was not
> adjusted. This lead to the same 64k counters (max achievable through
> single queue) were being queried. Any flow counters above that limit
> would get incorrect values.
> This patch addresses that by adding proper offset calculation during
> query loop.
> 
> Regarding the 2nd issue, tracking of how many counters were really
> queried during single loop was incorrect.
> In case when there weren't enough free WQEs in the queue,
> fewer counters were queried than expected.
> This mismatch was not taken into account, which in the resulted in some
> counters not being queried.
> This patch addresses that by adding proper reporting of the number
> of queried counters to mlx5_aso_cnt_sq_enqueue_burst().
> 
> Fixes: 4d368e1da3a4 ("net/mlx5: support flow counter action for HWS")
> Cc: stable@dpdk.org
> 
> Reported-by: Mohand Alrasheed <mrasheed@wirefilter.com>
> Signed-off-by: Xiaoyu Min <jackmin@nvidia.com>
> Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>

Patch applied to next-net-mlx,

Kindest regards
Raslan Darawsheh


      parent reply	other threads:[~2026-02-05 16:01 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-12 17:23 [PATCH] net/mlx5: fix HW flow counter query Dariusz Sosnowski
2026-01-20 12:05 ` Mohand Alrasheed
2026-02-05  9:22   ` Dariusz Sosnowski
2026-02-05 16:01 ` Raslan Darawsheh [this message]

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