From mboxrd@z Thu Jan  1 00:00:00 1970
From: Ferruh Yigit <ferruh.yigit@intel.com>
Subject: Re: [PATCH] net/axgbe: fix incorrect cache alignment
	macro
Date: Wed, 18 Apr 2018 18:44:12 +0100
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To: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>, ravi1.kumar@amd.com,
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On 4/18/2018 6:17 PM, Ferruh Yigit wrote:
> On 4/17/2018 9:04 PM, Pavan Nikhilesh wrote:
>> Due to missing ____cacheline_aligned definition compiler treats it as a
>> global variable replace it with proper cache alignment macro.
>>
>> Fixes: 9e890103267e ("net/axgbe: add Rx/Tx setup")
>>
>> Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> 
> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>

Applied to dpdk-next-net/master, thanks.