From mboxrd@z Thu Jan  1 00:00:00 1970
From: Stephen Hemminger <stephen-OTpzqLSitTUnbdJkjeBofR2eb7JE58TQ@public.gmane.org>
Subject: Re: [PATCH 5/7] pci: support multiple PCI regions per
 device
Date: Wed, 5 Jun 2013 08:49:27 -0700
Message-ID: <20130605084927.34f138c1@nehalam.linuxnetplumber.net>
References: <20130530171234.301927271@vyatta.com>
 <20130530171627.005239011@vyatta.com> <51AF501B.5060306@6wind.com>
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To: Damien Millescamps <damien.millescamps-pdR9zngts4EAvxtiuMwx3w@public.gmane.org>
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On Wed, 05 Jun 2013 16:50:03 +0200
Damien Millescamps <damien.millescamps-pdR9zngts4EAvxtiuMwx3w@public.gmane.org> wrote:

> Hi Stephen,
> 
> Overall this patch is very nice. My only comment on this one is why do
> you limit the max number of memory resources to 5 ?
> The PCI configuration space permits to store up to 6 base addresses.
> 
> > +#define PCI_MEM_RESOURCE 5
> 
> Please, can you add a log/comment with your patch, too ?
> 
> 
> Cheers,

Only because I was trying to save some space, and I didn't see any hardware
with that many useful regions. Also the kernel UIO driver has some control
over which regions get exposed.