From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Hemminger Subject: Re: [PATCH v7 09/10] igb: enable rx queue interrupts for PF Date: Tue, 5 May 2015 16:16:43 -0700 Message-ID: <20150505161643.222cfec9@urahara> References: <1425012976-10173-1-git-send-email-cunming.liang@intel.com> <1430804386-28949-1-git-send-email-cunming.liang@intel.com> <1430804386-28949-10-git-send-email-cunming.liang@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit Cc: dev-VfR2kkLFssw@public.gmane.org To: Cunming Liang Return-path: In-Reply-To: <1430804386-28949-10-git-send-email-cunming.liang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces-VfR2kkLFssw@public.gmane.org Sender: "dev" On Tue, 5 May 2015 13:39:45 +0800 Cunming Liang wrote: > The patch does below for igb PF: > - Setup NIC to generate MSI-X interrupts > - Set the IVAR register to map interrupt causes to vectors > - Implement interrupt enable/disable functions > > Signed-off-by: Danny Zhou > Signed-off-by: Cunming Liang What about E1000? This only usable if it works on all devices.