From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Hemminger Subject: Re: [PATCH 1/4] pci: allow access to PCI config space Date: Mon, 11 May 2015 10:31:04 -0700 Message-ID: <20150511103104.1c60565b@urahara> References: <1431041135-6289-1-git-send-email-stephen@networkplumber.org> <1431041135-6289-2-git-send-email-stephen@networkplumber.org> <38426478085b4e779e18967cd1b6ae4f@BRMWP-EXMB11.corp.brocade.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Cc: "dev@dpdk.org" , Stephen Hemminger To: Neil Horman Return-path: Received: from mail-pa0-f53.google.com (mail-pa0-f53.google.com [209.85.220.53]) by dpdk.org (Postfix) with ESMTP id E8FFAFE5 for ; Mon, 11 May 2015 19:31:00 +0200 (CEST) Received: by pacwv17 with SMTP id wv17so115087545pac.0 for ; Mon, 11 May 2015 10:31:00 -0700 (PDT) In-Reply-To: <38426478085b4e779e18967cd1b6ae4f@BRMWP-EXMB11.corp.brocade.com> List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Mon, 11 May 2015 12:54:54 +0000 Neil Horman wrote: > On Thu, May 07, 2015 at 04:25:32PM -0700, Stephen Hemminger wrote: > > From: Stephen Hemminger > > > > Some drivers need ability to access PCI config (for example for power > > management). This adds an abstraction to do this; only implemented > > on Linux, but should be possible on BSD. > > Could someone who has BSD infrastructure try this, not sure if it will even build. diff --git a/lib/librte_eal/bsdapp/eal/eal_pci.c b/lib/librte_eal/bsdapp/eal/eal_pci.c index 61e8921..8ba5b13 100644 --- a/lib/librte_eal/bsdapp/eal/eal_pci.c +++ b/lib/librte_eal/bsdapp/eal/eal_pci.c @@ -490,6 +490,76 @@ rte_eal_pci_probe_one_driver(struct rte_pci_driver *dr, struct rte_pci_device *d return 1; } +/* Read PCI config space. */ +int rte_eal_pci_read_config(const struct rte_pci_device *dev, + void *buf, size_t len, off_t offset) +{ + int fd = -1; + + fd = open("/dev/pci", O_RDONLY); + if (fd < 0) { + RTE_LOG(ERR, EAL, "%s(): error opening /dev/pci\n", __func__); + goto error; + } + + struct pci_io pi = { + .pi_sel = { + .pc_domain = dev->addr.domain, + .bus = dev->addr.bus, + .pc_dev = dev->addr.devid, + .pc_func = dev->addr.function, + }, + .pi_reg = offset, + .pi_data = buf, + .pi_width = len, + }; + + if (ioctl(fd, PCIIOCREAD, &pi) < 0) + goto error; + close(fd); + return 0; + +error: + if (fd >= 0) + close(fd); + return -1; +} + +/* Write PCI config space. */ +int rte_eal_pci_write_config(const struct rte_pci_device *device, + const void *buf, size_t len, off_t offset) +{ + int fd = -1; + + fd = open("/dev/pci", O_RDONLY); + if (fd < 0) { + RTE_LOG(ERR, EAL, "%s(): error opening /dev/pci\n", __func__); + goto error; + } + + struct pci_io pi = { + .pi_sel = { + .pc_domain = dev->addr.domain, + .bus = dev->addr.bus, + .pc_dev = dev->addr.devid, + .pc_func = dev->addr.function, + }, + .pi_reg = offset, + .pi_data = buf, + .pi_width = len, + }; + + if (ioctl(fd, PCIIOCWRITE, &pi) < 0) + goto error; + close(fd); + return 0; + +error: + if (fd >= 0) + close(fd); + return -1; +} + /* Init the PCI EAL subsystem */ int rte_eal_pci_init(void)