From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Michael S. Tsirkin" Subject: Re: Having troubles binding an SR-IOV VF to uio_pci_generic on Amazon instance Date: Fri, 2 Oct 2015 16:50:15 +0300 Message-ID: <20151002164848-mutt-send-email-mst@redhat.com> References: <560BF782.4070308@scylladb.com> <20150930175848-mutt-send-email-mst@redhat.com> <560C0171.7080507@scylladb.com> <20150930204016.GA29975@redhat.com> <20151001113828-mutt-send-email-mst@redhat.com> <560CF44A.60102@scylladb.com> <20151001120027-mutt-send-email-mst@redhat.com> <560CFB66.5050904@scylladb.com> <20151001123335-mutt-send-email-mst@redhat.com> <560DA2FD.1050507@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: "dev@dpdk.org" , Avi Kivity To: Alexander Duyck Return-path: Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) by dpdk.org (Postfix) with ESMTP id 36CBF8DB1 for ; Fri, 2 Oct 2015 15:50:20 +0200 (CEST) Content-Disposition: inline In-Reply-To: <560DA2FD.1050507@gmail.com> List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Thu, Oct 01, 2015 at 02:17:49PM -0700, Alexander Duyck wrote: > On 10/01/2015 02:42 AM, Michael S. Tsirkin wrote: > >On Thu, Oct 01, 2015 at 12:22:46PM +0300, Avi Kivity wrote: > >>even when they are some users > >>prefer to avoid the performance penalty. > >I don't think there's a measureable penalty from passing through the > >IOMMU, as long as mappings are mostly static (i.e. iommu=pt). I sure > >never saw any numbers that show such. > > It depends on the IOMMU. I believe Intel had a performance penalty on all > CPUs prior to Ivy Bridge. Since then things have improved to where they are > comparable to bare metal. > > The graph on page 5 of > https://networkbuilders.intel.com/docs/Network_Builders_RA_vBRAS_Final.pdf > shows the penalty clear as day. Pretty much anything before Ivy Bridge w/ > small packets is slowed to a crawl with an IOMMU enabled. > > - Alex VMs are running with IOMMU enabled anyway. Avi here tells us no one uses SRIOV on bare metal so ... we don't need to argue about that. -- MST