From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bruce Richardson Subject: Re: [Q] l2fwd in examples directory Date: Mon, 19 Oct 2015 10:34:31 +0100 Message-ID: <20151019093431.GA11324@bricha3-MOBL3> References: <20151016134320.GE9980@bricha3-MOBL3> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: dev@dpdk.org To: Moon-Sang Lee Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 8E6CE8E7E for ; Mon, 19 Oct 2015 11:34:39 +0200 (CEST) Content-Disposition: inline In-Reply-To: List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Mon, Oct 19, 2015 at 04:39:41PM +0900, Moon-Sang Lee wrote: > My NUT has Xeon L5520 that is based on Nehalem microarchitecture. > Does Nehalem supports PCIe interface on chipset? For nehalem, I think having the PCI numa node reported as -1 is normal, as it's not directly connected to the physical sockets, but connected to the chipset instead. For later generation CPU Xeon platforms, your PCI slots are physically going to be connected to one CPU socket or the other. /Bruce