From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bruce Richardson Subject: Re: [PATCH] vhost: call write barrier before used index update Date: Tue, 20 Oct 2015 15:29:51 +0100 Message-ID: <20151020142951.GA18496@bricha3-MOBL3> References: <1445350066-31818-1-git-send-email-n.kalyazin@samsung.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: dev@dpdk.org, Dyasly Sergey To: Nikita Kalyazin Return-path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id 324B78E80 for ; Tue, 20 Oct 2015 16:30:22 +0200 (CEST) Content-Disposition: inline In-Reply-To: <1445350066-31818-1-git-send-email-n.kalyazin@samsung.com> List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Tue, Oct 20, 2015 at 05:07:46PM +0300, Nikita Kalyazin wrote: > Descriptors that have been put into the used vring must be observable by > guest earlier than the new used index value. > Although compiler barrier serves well for Intel architectue here, the > proper cross-platform solution is to use write barrier before the used > index is updated. > > Signed-off-by: Nikita Kalyazin > --- Yes, but no! :-) This has been discussed a number of times before on list, and the consensus seems to be that the correct way to fix this is to introduce a set of specific barrier operations that insert the correct barrier type on each architecture, i.e. compiler barriers on IA, and full wmbs on architectures that require that. See discussion here: http://dpdk.org/dev/patchwork/patch/4293/ and in the thread here: http://dpdk.org/ml/archives/dev/2015-March/015202.html So correct problem statment, but unfortunately NAK for the implementation. Patches for general memory barrier implementation as described above welcome :-) Regards, /Bruce