From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jerin Jacob Subject: Re: [PATCH v1 0/5] clean-up cpuflags Date: Wed, 3 Feb 2016 21:06:23 +0530 Message-ID: <20160203153622.GA11424@localhost.localdomain> References: <1454453993-3903-1-git-send-email-thomas.monjalon@6wind.com> <20160203133810.GA7359@localhost.localdomain> <2567498.ifnkeR5xCN@xps13> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Cc: dev@dpdk.org, viktorin@rehivetech.com To: Thomas Monjalon Return-path: Received: from na01-bl2-obe.outbound.protection.outlook.com (mail-bl2on0053.outbound.protection.outlook.com [65.55.169.53]) by dpdk.org (Postfix) with ESMTP id 213BF9655 for ; Wed, 3 Feb 2016 16:36:48 +0100 (CET) Content-Disposition: inline In-Reply-To: <2567498.ifnkeR5xCN@xps13> List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Wed, Feb 03, 2016 at 03:01:26PM +0100, Thomas Monjalon wrote: > 2016-02-03 19:08, Jerin Jacob: > > On Tue, Feb 02, 2016 at 11:59:48PM +0100, Thomas Monjalon wrote: > > compilation errors on arm64 too. > > Yes I forgot REG_PLATFORM. > > > arm64 toolchains are publicly available @ > > http://releases.linaro.org/14.11/components/toolchain/binaries/aarch64-linux-gnu/ > > Yes I know, thank you. > I will test and make a v2. > > Do you have any comment on the changes? looks good, nice cleanup. IMO, Something like below can be done to remove the #ifdef clutter in rte_cpu_get_features for ARM introduced in this rework [master] pass2 [dpdk-master] $ git diff diff --git a/lib/librte_eal/common/arch/arm/rte_cpuflags.c b/lib/librte_eal/common/arch/arm/rte_cpuflags.c index fba0a61..861ac57 100644 --- a/lib/librte_eal/common/arch/arm/rte_cpuflags.c +++ b/lib/librte_eal/common/arch/arm/rte_cpuflags.c @@ -71,6 +71,9 @@ struct feature_entry { [RTE_CPUFLAG_##name] = {reg, bit, #name}, #ifdef RTE_ARCH_64 +#define PLATFORM_STR "aarch64" +typedef Elf64_auxv_t _Elfx_auxv_t + const struct feature_entry rte_cpu_feature_table[] = { FEAT_DEF(FP, REG_HWCAP, 0) FEAT_DEF(NEON, REG_HWCAP, 1) @@ -83,6 +86,9 @@ const struct feature_entry rte_cpu_feature_table[] = { FEAT_DEF(AARCH64, REG_PLATFORM, 1) }; #else +#define PLATFORM_STR "v7l" +typedef Elf32_auxv_t _Elfx_auxv_t + const struct feature_entry rte_cpu_feature_table[] = { FEAT_DEF(SWP, REG_HWCAP, 0) FEAT_DEF(HALF, REG_HWCAP, 1) @@ -115,6 +121,7 @@ const struct feature_entry rte_cpu_feature_table[] = { }; #endif + /* * Read AUXV software register and get cpu features for ARM */ @@ -122,11 +129,8 @@ static void rte_cpu_get_features(hwcap_registers_t out) { int auxv_fd; -#ifdef RTE_ARCH_64 - Elf64_auxv_t auxv; -#else - Elf32_auxv_t auxv; -#endif + + _Elfx_auxv_t auxv; auxv_fd = open("/proc/self/auxv", O_RDONLY); assert(auxv_fd); @@ -136,11 +140,7 @@ rte_cpu_get_features(hwcap_registers_t out) } else if (auxv.a_type == AT_HWCAP2) { out[REG_HWCAP2] = auxv.a_un.a_val; } else if (auxv.a_type == AT_PLATFORM) { -#ifdef RTE_ARCH_64 - if (!strcmp((const char *)auxv.a_un.a_val, "aarch64")) -#else - if (!strcmp((const char *)auxv.a_un.a_val, "v7l")) -#endif + if (!strcmp((const char *)auxv.a_un.a_val, PLATFORM_STR)) out[REG_PLATFORM] = 0x0001; } } Jerin