From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rahul Lakkireddy Subject: Re: [PATCH v8 2/4] ethdev: Fill speed capability bitmaps in the PMDs Date: Mon, 15 Feb 2016 20:13:12 +0530 Message-ID: <20160215144310.GA19031@scalar.blr.asicdesigners.com> References: <1454028127-10401-1-git-send-email-marcdevel@gmail.com> <1455488259-1000-1-git-send-email-marcdevel@gmail.com> <1455488259-1000-3-git-send-email-marcdevel@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: dev@dpdk.org, Kumar Sanghvi , Nirranjan Kirubaharan To: Marc Sune Return-path: Received: from stargate3.asicdesigners.com (stargate.chelsio.com [12.32.117.8]) by dpdk.org (Postfix) with ESMTP id 410B195D1 for ; Mon, 15 Feb 2016 15:43:23 +0100 (CET) Content-Disposition: inline In-Reply-To: <1455488259-1000-3-git-send-email-marcdevel@gmail.com> List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi Marc, On Sunday, February 02/14/16, 2016 at 23:17:37 +0100, Marc Sune wrote: > Added speed capabilities to all pmds supporting physical NICs: > > * e1000 > * ixgbe > * i40 > * bnx2x > * cxgbe > * mlx4 > * mlx5 > * nfp > * fm10k > > Signed-off-by: Marc Sune > --- > drivers/net/bnx2x/bnx2x_ethdev.c | 1 + > drivers/net/cxgbe/cxgbe_ethdev.c | 1 + > drivers/net/e1000/em_ethdev.c | 6 ++++++ > drivers/net/e1000/igb_ethdev.c | 6 ++++++ > drivers/net/fm10k/fm10k_ethdev.c | 4 ++++ > drivers/net/i40e/i40e_ethdev.c | 9 +++++++++ > drivers/net/ixgbe/ixgbe_ethdev.c | 10 ++++++++++ > drivers/net/mlx4/mlx4.c | 4 ++++ > drivers/net/mlx5/mlx5_ethdev.c | 5 +++++ > drivers/net/nfp/nfp_net.c | 2 ++ > 10 files changed, 48 insertions(+) > [...] > diff --git a/drivers/net/cxgbe/cxgbe_ethdev.c b/drivers/net/cxgbe/cxgbe_ethdev.c > index 97ef152..203e119 100644 > --- a/drivers/net/cxgbe/cxgbe_ethdev.c > +++ b/drivers/net/cxgbe/cxgbe_ethdev.c > @@ -171,6 +171,7 @@ static void cxgbe_dev_info_get(struct rte_eth_dev *eth_dev, > > device_info->rx_desc_lim = cxgbe_desc_lim; > device_info->tx_desc_lim = cxgbe_desc_lim; > + device_info->speed_capa = ETH_SPEED_CAP_10G | ETH_SPEED_CAP_40G; > } > Not all Chelsio NICs support _both_ 10G and 40G speed capabilities on a single card. You can query pi->link_cfg.supported to get the supported speeds. Check out print_port_info() in cxgbe_main.c to help you fill in your speed capabilities for Chelsio NICs. Thanks, Rahul