From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bruce Richardson Subject: Re: [PATCH] igb: fix crash with offload on 82575 chipset Date: Fri, 25 Mar 2016 15:26:19 +0000 Message-ID: <20160325152618.GE7916@bricha3-MOBL3> References: <1458901920-21677-1-git-send-email-olivier.matz@6wind.com> <2601191342CEEE43887BDE71AB97725836B21152@irsmsx105.ger.corp.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: quoted-printable Cc: Olivier Matz , "dev@dpdk.org" , "Lu, Wenzhuo" To: "Ananyev, Konstantin" Return-path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id A34315587 for ; Fri, 25 Mar 2016 16:26:56 +0100 (CET) Content-Disposition: inline In-Reply-To: <2601191342CEEE43887BDE71AB97725836B21152@irsmsx105.ger.corp.intel.com> List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Fri, Mar 25, 2016 at 02:06:51PM +0000, Ananyev, Konstantin wrote: >=20 >=20 > > -----Original Message----- > > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Olivier Matz > > Sent: Friday, March 25, 2016 10:32 AM > > To: dev@dpdk.org > > Cc: Lu, Wenzhuo > > Subject: [dpdk-dev] [PATCH] igb: fix crash with offload on 82575 chip= set > >=20 > > On the 82575 chipset, there is a pool of global TX contexts instead o= f 2 > > per queues on 82576. See Table A-1 "Changes in Programming Interface > > Relative to 82575" of Intel=AE 82576EB GbE Controller datasheet (*). > >=20 > > In the driver, the contexts are attributed to a TX queue: 0-1 for txq= 0, > > 2-3 for txq1, and so on. > >=20 > > In igbe_set_xmit_ctx(), the variable ctx_curr contains the index of t= he > > per-queue context (0 or 1), and ctx_idx contains the index to be give= n > > to the hardware (0 to 7). The size of txq->ctx_cache[] is 2, and must > > be indexed with ctx_curr to avoid an out-of-bound access. > >=20 > > Also, the index returned by what_advctx_update() is the per-queue > > index (0 or 1), so we need to add txq->ctx_start before sending it > > to the hardware. > >=20 > > (*) The datasheets says 16 global contexts, however the IDX fields in= TX > > descriptors are 3 bits, which gives a total of 8 contexts. The > > driver assumes there are 8 contexts on 82575: 2 per queues, 4 txq= s. > >=20 > > Fixes: 4c8db5f09a ("igb: enable TSO support") > > Fixes: af75078fec ("first public release") > > Signed-off-by: Olivier Matz >=20 > Acked-by: Konstantin Ananyev Applied to dpdk-next-net/rel_16_04 /Bruce