From mboxrd@z Thu Jan  1 00:00:00 1970
From: Bruce Richardson <bruce.richardson@intel.com>
Subject: Re: [PATCH] net/fm10k: fix Rx descriptor read timing
Date: Tue, 5 Jul 2016 10:47:32 +0100
Message-ID: <20160705094731.GE10232@bricha3-MOBL3>
References: <1467618668-28611-1-git-send-email-xiao.w.wang@intel.com>
 <20160705094342.GD10232@bricha3-MOBL3>
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Cc: jing.d.chen@intel.com, dev@dpdk.org
To: Wang Xiao W <xiao.w.wang@intel.com>
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On Tue, Jul 05, 2016 at 10:43:42AM +0100, Bruce Richardson wrote:
> On Mon, Jul 04, 2016 at 03:51:08PM +0800, Wang Xiao W wrote:
> > We find that when traffic is light, a few amount of packets will be
> > wrongly parsed (e.g. packet type), however this issue will not happen
> > when traffic is heavy.
> > 
> > The root cause is some fields in fm10k_rx_desc are read at wrong timing.
> > When the input speed is slower than software's capability, fm10k scalar
> > Rx function accesses descriptors closely to HW, so there's potential
> > sequence: some fields like pkt_info in fm10k_rx_desc are read before HW
> > writeback but some fields like DD bit are read after HW writeback, this
> > will lead to the later packet parsing function using incorrect value.
> > 
> > This patch fixes this issue by reading and parsing Rx descriptor after
> > DD bit is set.
> > 
> > Fixes: 4b61d3bfa941 ("fm10k: add receive and tranmit")
> > Fixes: c82dd0a7bfa5 ("fm10k: add scatter receive")
> > 
> > Signed-off-by: Wang Xiao W <xiao.w.wang@intel.com>
> 
> Fix looks correct to me. The key part I think is that the read of the
> descriptor at line "desc = q->hw_ring[next_dd];" is not atomic as it's
> a read of 16B, allowing part of the descriptor to be read either side of
> a HW write-back.
> 
> Acked-by: Bruce Richardson <bruce.richardson@intel.com>
> 
Applied to dpdk-next-net/rel_16_07

/Bruce