From mboxrd@z Thu Jan  1 00:00:00 1970
From: Bruce Richardson <bruce.richardson@intel.com>
Subject: Re: [PATCH v3 3/6] ena: disable readless communication
 regarding to HW revision
Date: Tue, 5 Jul 2016 16:47:34 +0100
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Cc: dev@dpdk.org, ferruh.yigit@intel.com,
 Alexander Matushevsky <matua@amazon.com>, Jakub Palider <jpa@semihalf.com>
To: Jan =?utf-8?Q?M=C4=99dala?= <jan@semihalf.com>
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On Tue, Jul 05, 2016 at 12:02:41PM +0200, Jan M=C4=99dala wrote:
> Bruce,
>=20
> Here's explanation of readless communication (on behalf of Alex):
>=20
> > "readless" refers to ability to read ENA registers without actually
> > issuing read request from host (x86).
> > Instead, host programs 2 registers on device that trigger DMA from de=
vice
> > to host and report register value.
> > However, this functionality is not going to be available in all type =
of
> > devices. The decision if this mode is supported or not , is taken fro=
m
> > revision_id in pci configuration space.
>=20
>=20

Thanks, I'll add this into the commit message to help explain things to a=
nyone
looking at the commit later.

/Bruce

> Regards
>=20
>   Jan
>=20
> 2016-07-04 17:43 GMT+02:00 Bruce Richardson <bruce.richardson@intel.com=
>:
>=20
> > On Thu, Jun 30, 2016 at 05:04:56PM +0200, Jan Medala wrote:
> > > Depending on HW revision readless communcation between host and dev=
ice
> > > may be unavailable.
> > > In that case prevent PMD of seting up readless communication mechan=
ism.
> > >
> > The idea of readless communication is a strange one. Can you provide =
a bit
> > more detail as to what "readless communication" refers to.
> >
> > /Bruce
> >