From mboxrd@z Thu Jan  1 00:00:00 1970
From: =?iso-8859-1?Q?N=E9lio?= Laranjeiro <nelio.laranjeiro@6wind.com>
Subject: Re: [PATCH 8/8] net/mlx5: fix inline logic
Date: Wed, 14 Sep 2016 13:07:31 +0200
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Cc: dev@dpdk.org, Vasily Philipov <vasilyf@mellanox.com>
To: Ferruh Yigit <ferruh.yigit@intel.com>
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On Wed, Sep 14, 2016 at 11:43:35AM +0100, Ferruh Yigit wrote:
> Hi Nelio,
> 
> On 9/7/2016 8:02 AM, Nelio Laranjeiro wrote:
> > To improve performance the NIC expects for large packets to have a pointer
> > to a cache aligned address, old inline code could break this assumption
> > which hurts performance.
> > 
> > Fixes: 2a66cf378954 ("net/mlx5: support inline send")
> > 
> > Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
> > Signed-off-by: Vasily Philipov <vasilyf@mellanox.com>
> > ---
> 
> ...
> 
> > @@ -607,8 +523,13 @@ mlx5_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
> >  				MLX5_ETH_WQE_L3_CSUM |
> >  				MLX5_ETH_WQE_L4_CSUM;
> >  		} else {
> > -			wqe->wqe.eseg.cs_flags = 0;
> > +			wqe->eseg.cs_flags = 0;
> 
> This cause a compilation error, and looks like a typo:
> 
> .../drivers/net/mlx5/mlx5_rxtx.c: In function ‘mlx5_tx_burst’:
> .../drivers/net/mlx5/mlx5_rxtx.c:526:7: error: ‘volatile union mlx5_wqe’
> has no member named ‘eseg’
>     wqe->eseg.cs_flags = 0;
>        ^~

Hi Ferruh,

You are totally right.  I will fix it, re-test and send a V2 today.

Thanks,

-- 
Nélio Laranjeiro
6WIND