From mboxrd@z Thu Jan 1 00:00:00 1970 From: Adrien Mazarguil Subject: Re: Possible bug in mlx5_tx_burst_mpw? Date: Wed, 14 Sep 2016 16:30:34 +0200 Message-ID: <20160914143016.GT17252@6wind.com> References: Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: "dev@dpdk.org" To: Luke Gorrie Return-path: Received: from mail-wm0-f49.google.com (mail-wm0-f49.google.com [74.125.82.49]) by dpdk.org (Postfix) with ESMTP id 974942BDC for ; Wed, 14 Sep 2016 16:30:48 +0200 (CEST) Received: by mail-wm0-f49.google.com with SMTP id 1so34869757wmz.1 for ; Wed, 14 Sep 2016 07:30:48 -0700 (PDT) Content-Disposition: inline In-Reply-To: List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi Luke, On Wed, Sep 14, 2016 at 03:24:07PM +0200, Luke Gorrie wrote: > Howdy, > > Just noticed a line of code that struck me as odd and so I am writing just > in case it is a bug: > > http://dpdk.org/browse/dpdk/tree/drivers/net/mlx5/mlx5_rxtx.c#n1014 > > Specifically the check "(mpw.length != length)" in mlx_tx_burst_mpw() looks > like a descriptor-format optimization for the special case where > consecutive packets on the wire are exactly the same size. This would > strike me as peculiar. > > Just wanted to check, is that interpretation correct and if so then is this > intentional? Your interpretation is correct (this is intentional and not a bug). In the event successive packets share a few properties (length, number of segments, offload flags), these can be factored out as an optimization to lower the amount of traffic on the PCI bus. This feature is currently supported by the ConnectX-4 Lx family of adapters. -- Adrien Mazarguil 6WIND