From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bruce Richardson Subject: Re: [PATCH v3 01/10] net/bnx2x: set cache line based on build configuration Date: Thu, 13 Oct 2016 10:45:34 +0100 Message-ID: <20161013094533.GA127400@bricha3-MOBL3> References: <1476227101-19268-1-git-send-email-3chas3@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: dev@dpdk.org, harish.patil@qlogic.com To: Chas Williams <3chas3@gmail.com> Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 93F3258EB for ; Thu, 13 Oct 2016 11:45:37 +0200 (CEST) Content-Disposition: inline In-Reply-To: <1476227101-19268-1-git-send-email-3chas3@gmail.com> List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Tue, Oct 11, 2016 at 07:04:52PM -0400, Chas Williams wrote: > Correctly hint the cache line size. Remove unused macros associated > with the cache line size. > > Fixes: 540a211084a7 ("bnx2x: driver core") > > Signed-off-by: Chas Williams <3chas3@gmail.com> > Acked-by: Harish Patil Series applied to dpdk-next-net/rel_16_11 /Bruce