From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Hemminger Subject: Re: [PATCH 2/2] hyperv: VMBUS support infrastucture Date: Fri, 16 Dec 2016 12:15:22 -0800 Message-ID: <20161216121522.58281062@xeon-e3> References: <20161214235920.12877-1-sthemmin@microsoft.com> <544b6faf-11f4-93fe-6427-7d3fcfaba388@nxp.com> <20161215092631.5cb798b2@xeon-e3> <17034171.EHDWhStFHz@xps13> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Cc: dev@dpdk.org, Shreyansh Jain , Stephen Hemminger To: Thomas Monjalon Return-path: Received: from mail-pg0-f53.google.com (mail-pg0-f53.google.com [74.125.83.53]) by dpdk.org (Postfix) with ESMTP id 6DB743792 for ; Fri, 16 Dec 2016 21:15:31 +0100 (CET) Received: by mail-pg0-f53.google.com with SMTP id p66so35613008pga.2 for ; Fri, 16 Dec 2016 12:15:31 -0800 (PST) In-Reply-To: <17034171.EHDWhStFHz@xps13> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Fri, 16 Dec 2016 19:09:02 +0100 Thomas Monjalon wrote: > 2016-12-15 09:26, Stephen Hemminger: > > On Thu, 15 Dec 2016 12:19:44 +0530 > > Shreyansh Jain wrote: > > > It is not a scale-able model where we have to change eth_driver/eth_dev > > > for every new device type, other than PCI. Maybe VMBus is _very_ close > > > to PCI so no changes are required in PCI layer (common, linuxapp, > > > bsdapp) - but, for others it won't stop there. > > > > > > At the least, rte_pci_driver/rte_pci_device should be removed from > > > eth_driver & rte_eth_dev, respectively - relying on rte_driver and > > > rte_device. > > > > > > This is the primary reason work on the SoC patchset and now the new Bus > > > model is being done. > > > > Agreed. the better long term model is to use C style inheritance where > > rte_pci_driver has eth_driver inside. > > The other alternative is to make the second element an opaque pointer. > > > > But that was too big a change, and not necessary to get VMBUS to work. > > Longer term refactoring will take more effort. Go ahead and address it > > with a better bus model, but that probably isn't going to be ready for > > a couple of releases. > > We'll consider only the approach of generalizing the bus model for integr ation. > Stephen, you are welcome to help make it happen and rebase your work > on top of this new model. > Thanks I will generalize it to PCI and VMBUS only. I am not inventing a generic SOC model since that is something that I don't have sufficient knowledge. This fits the YAGNI principle.