From mboxrd@z Thu Jan 1 00:00:00 1970 From: Adrien Mazarguil Subject: Re: [PATCH v2 15/18] net/ixgbe: parse flow director filter Date: Tue, 3 Jan 2017 15:08:14 +0100 Message-ID: <20170103140814.GB12822@6wind.com> References: <1483084390-53159-1-git-send-email-wei.zhao1@intel.com> <1483084390-53159-16-git-send-email-wei.zhao1@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: dev@dpdk.org, Wenzhuo Lu To: Wei Zhao Return-path: Received: from mail-wm0-f44.google.com (mail-wm0-f44.google.com [74.125.82.44]) by dpdk.org (Postfix) with ESMTP id 112B937A4 for ; Tue, 3 Jan 2017 15:08:22 +0100 (CET) Received: by mail-wm0-f44.google.com with SMTP id c85so200199386wmi.1 for ; Tue, 03 Jan 2017 06:08:22 -0800 (PST) Content-Disposition: inline In-Reply-To: <1483084390-53159-16-git-send-email-wei.zhao1@intel.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi Wei, On Fri, Dec 30, 2016 at 03:53:07PM +0800, Wei Zhao wrote: > check if the rule is a flow director rule, and get the flow director info. > > Signed-off-by: Wei Zhao > Signed-off-by: Wenzhuo Lu > > --- > > v2:add new error set function > --- > drivers/net/ixgbe/ixgbe_ethdev.c | 1467 +++++++++++++++++++++++++++++++++----- > drivers/net/ixgbe/ixgbe_ethdev.h | 16 + > drivers/net/ixgbe/ixgbe_fdir.c | 247 ++++--- > lib/librte_ether/rte_flow.h | 23 + > 4 files changed, 1495 insertions(+), 258 deletions(-) [...] > diff --git a/lib/librte_ether/rte_flow.h b/lib/librte_ether/rte_flow.h > index e9e6220..e59f458 100644 > --- a/lib/librte_ether/rte_flow.h > +++ b/lib/librte_ether/rte_flow.h > @@ -275,6 +275,13 @@ enum rte_flow_item_type { > * See struct rte_flow_item_e_tag. > */ > RTE_FLOW_ITEM_TYPE_E_TAG, > + > + /** > + * Matches a NVGRE header. > + * > + * See struct rte_flow_item_nvgre. > + */ > + RTE_FLOW_ITEM_TYPE_NVGRE, > }; > > /** > @@ -486,6 +493,22 @@ struct rte_flow_item_e_tag { > }; > > /** > + * RTE_FLOW_ITEM_TYPE_NVGRE. > + * > + * Matches a NVGRE header. > + */ > +struct rte_flow_item_nvgre { > + uint32_t flags0:1; /**< 0 */ > + uint32_t rsvd1:1; /**< 1 bit not defined */ > + uint32_t flags1:2; /**< 2 bits, 1 0 */ > + uint32_t rsvd0:9; /**< Reserved0 */ > + uint32_t ver:3; /**< version */ > + uint32_t protocol:16; /**< protocol type, 0x6558 */ > + uint8_t tni[3]; /**< tenant network ID or virtual subnet ID */ > + uint8_t flow_id; /**< flow ID or Reserved */ > +}; [...] See my previous reply [1], this definition is not endian-safe due to the use of bit-fields and should look more like the VXLAN item. Here is an untested suggestion (not sure about all values): struct rte_flow_item_nvgre { /** * Checksum (1b), undefined (1b), key bit (1b), sequence number (1b), * reserved 0 (9b), version (3b). * * \c_k_s_rsvd0_ver must have value 0x2000 according to RFC 7637. */ uint16_t c_k_s_rsvd0_ver; uint16_t proto; /**< Protocol type (0x6558). */ uint8_t vsid[3]; /**< Virtual subnet ID. */ uint8_t flow_id; /**< Flow ID. */ }; Like for E-Tag, applications are responsibile for breaking down and filling individual fields properly. [1] http://dpdk.org/ml/archives/dev/2016-December/053181.html Message ID: 20161223081310.GH10340@6wind.com -- Adrien Mazarguil 6WIND