From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jerin Jacob Subject: Re: [PATCH 5/6] eal/arm: fix warnings seen with armv8a clang Date: Thu, 11 May 2017 11:03:18 +0530 Message-ID: <20170511053317.GE3057@jerin> References: <20170510101643.30556-1-ashwin.sekhar@caviumnetworks.com> <20170510101643.30556-6-ashwin.sekhar@caviumnetworks.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: thomas@monjalon.net, maciej.czekaj@caviumnetworks.com, viktorin@rehivetech.com, jianbo.liu@linaro.org, bruce.richardson@intel.com, pablo.de.lara.guarch@intel.com, konstantin.ananyev@intel.com, dev@dpdk.org To: Ashwin Sekhar T K Return-path: Received: from NAM01-BN3-obe.outbound.protection.outlook.com (unknown [104.47.33.51]) by dpdk.org (Postfix) with ESMTP id 3016E106A for ; Thu, 11 May 2017 07:33:49 +0200 (CEST) Content-Disposition: inline In-Reply-To: <20170510101643.30556-6-ashwin.sekhar@caviumnetworks.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" -----Original Message----- > Date: Wed, 10 May 2017 03:16:42 -0700 > From: Ashwin Sekhar T K > To: thomas@monjalon.net, jerin.jacob@caviumnetworks.com, > maciej.czekaj@caviumnetworks.com, viktorin@rehivetech.com, > jianbo.liu@linaro.org, bruce.richardson@intel.com, > pablo.de.lara.guarch@intel.com, konstantin.ananyev@intel.com > Cc: dev@dpdk.org, Ashwin Sekhar T K > Subject: [dpdk-dev] [PATCH 5/6] eal/arm: fix warnings seen with armv8a clang > X-Mailer: git-send-email 2.13.0.rc1 > > Fixed warning -Wasm-operand-widths seen with armv8a > clang compilation. > > Signed-off-by: Ashwin Sekhar T K Reviewed-by: Jerin Jacob > --- > lib/librte_eal/common/include/arch/arm/rte_byteorder.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/lib/librte_eal/common/include/arch/arm/rte_byteorder.h b/lib/librte_eal/common/include/arch/arm/rte_byteorder.h > index 1b312b306..0a29f4bb4 100644 > --- a/lib/librte_eal/common/include/arch/arm/rte_byteorder.h > +++ b/lib/librte_eal/common/include/arch/arm/rte_byteorder.h > @@ -52,7 +52,7 @@ static inline uint16_t rte_arch_bswap16(uint16_t _x) > { > register uint16_t x = _x; > > - asm volatile ("rev16 %0,%1" > + asm volatile ("rev16 %w0,%w1" > : "=r" (x) > : "r" (x) > ); > -- > 2.13.0.rc1 >