From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ashwin Sekhar T K Subject: [PATCH v5 1/4] mk: add crypto capability for generic armv8a and thunderx Date: Fri, 12 May 2017 03:15:32 -0700 Message-ID: <20170512101535.7221-2-ashwin.sekhar@caviumnetworks.com> References: <20170427140618.35897-1-ashwin.sekhar@caviumnetworks.com> <20170512101535.7221-1-ashwin.sekhar@caviumnetworks.com> Mime-Version: 1.0 Content-Type: text/plain Cc: dev@dpdk.org, Ashwin Sekhar T K To: jerin.jacob@caviumnetworks.com, thomas@monjalon.net, viktorin@rehivetech.com, jianbo.liu@linaro.org, jasvinder.singh@intel.com Return-path: Received: from NAM03-DM3-obe.outbound.protection.outlook.com (mail-dm3nam03on0071.outbound.protection.outlook.com [104.47.41.71]) by dpdk.org (Postfix) with ESMTP id AF103DE0 for ; Fri, 12 May 2017 12:15:52 +0200 (CEST) In-Reply-To: <20170512101535.7221-1-ashwin.sekhar@caviumnetworks.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" armv8-a has optional CRYPTO extension which adds the AES, PMULL, SHA1 and SHA2 capabilities. -march=armv8-a+crypto enables code generation for the ARMv8-A architecture together with the optional CRYPTO extensions. Added the following flags to detect the corresponding capability at compile time. * RTE_MACHINE_CPUFLAG_AES * RTE_MACHINE_CPUFLAG_PMULL * RTE_MACHINE_CPUFLAG_SHA1 * RTE_MACHINE_CPUFLAG_SHA2 At run-time, the following flags can be used to detect the capabilities. * RTE_CPUFLAG_AES * RTE_CPUFLAG_PMULL * RTE_CPUFLAG_SHA1 * RTE_CPUFLAG_SHA2 Signed-off-by: Ashwin Sekhar T K Reviewed-by: Jan Viktorin --- mk/machine/armv8a/rte.vars.mk | 2 +- mk/machine/thunderx/rte.vars.mk | 2 +- mk/rte.cpuflags.mk | 6 ++++++ mk/toolchain/gcc/rte.toolchain-compat.mk | 1 + 4 files changed, 9 insertions(+), 2 deletions(-) diff --git a/mk/machine/armv8a/rte.vars.mk b/mk/machine/armv8a/rte.vars.mk index d5049e1f1..51966a5b6 100644 --- a/mk/machine/armv8a/rte.vars.mk +++ b/mk/machine/armv8a/rte.vars.mk @@ -55,4 +55,4 @@ # CPU_LDFLAGS = # CPU_ASFLAGS = -MACHINE_CFLAGS += -march=armv8-a+crc +MACHINE_CFLAGS += -march=armv8-a+crc+crypto diff --git a/mk/machine/thunderx/rte.vars.mk b/mk/machine/thunderx/rte.vars.mk index ad5a379b0..678410581 100644 --- a/mk/machine/thunderx/rte.vars.mk +++ b/mk/machine/thunderx/rte.vars.mk @@ -55,4 +55,4 @@ # CPU_LDFLAGS = # CPU_ASFLAGS = -MACHINE_CFLAGS += -march=armv8-a+crc -mcpu=thunderx +MACHINE_CFLAGS += -march=armv8-a+crc+crypto -mcpu=thunderx diff --git a/mk/rte.cpuflags.mk b/mk/rte.cpuflags.mk index 4288c1470..a813c91f4 100644 --- a/mk/rte.cpuflags.mk +++ b/mk/rte.cpuflags.mk @@ -125,6 +125,12 @@ ifneq ($(filter $(AUTO_CPUFLAGS),__ARM_FEATURE_CRC32),) CPUFLAGS += CRC32 endif +ifneq ($(filter $(AUTO_CPUFLAGS),__ARM_FEATURE_CRYPTO),) +CPUFLAGS += AES +CPUFLAGS += PMULL +CPUFLAGS += SHA1 +CPUFLAGS += SHA2 +endif MACHINE_CFLAGS += $(addprefix -DRTE_MACHINE_CPUFLAG_,$(CPUFLAGS)) diff --git a/mk/toolchain/gcc/rte.toolchain-compat.mk b/mk/toolchain/gcc/rte.toolchain-compat.mk index 280dde2a6..01ac7e232 100644 --- a/mk/toolchain/gcc/rte.toolchain-compat.mk +++ b/mk/toolchain/gcc/rte.toolchain-compat.mk @@ -60,6 +60,7 @@ else # ifeq ($(shell test $(GCC_VERSION) -le 49 && echo 1), 1) MACHINE_CFLAGS := $(patsubst -march=armv8-a+crc,-march=armv8-a+crc -D__ARM_FEATURE_CRC32=1,$(MACHINE_CFLAGS)) + MACHINE_CFLAGS := $(patsubst -march=armv8-a+crc+crypto,-march=armv8-a+crc+crypto -D__ARM_FEATURE_CRC32=1,$(MACHINE_CFLAGS)) endif ifeq ($(shell test $(GCC_VERSION) -le 47 && echo 1), 1) MACHINE_CFLAGS := $(patsubst -march=core-avx-i,-march=corei7-avx,$(MACHINE_CFLAGS)) -- 2.12.2