From mboxrd@z Thu Jan  1 00:00:00 1970
From: Bruce Richardson <bruce.richardson@intel.com>
Subject: Re: [PATCH v2] ring: use aligned memzone allocation
Date: Tue, 6 Jun 2017 13:42:01 +0100
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Cc: "Verkamp, Daniel" <daniel.verkamp@intel.com>, "dev@dpdk.org" <dev@dpdk.org>
To: "Ananyev, Konstantin" <konstantin.ananyev@intel.com>
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On Tue, Jun 06, 2017 at 10:59:59AM +0100, Ananyev, Konstantin wrote:
> 
> > >
> > >
> > >
> > > >
> > > > The PROD/CONS_ALIGN values on x86-64 are set to 2 cache lines, so members
> > > of struct rte_ring are 128 byte aligned,
> > > >and therefore the whole struct needs 128-byte alignment according to the ABI
> > > so that the 128-byte alignment of the fields can be guaranteed.
> > >
> > > Ah ok, missed the fact that rte_ring is 128B aligned these days.
> > > BTW, I probably missed the initial discussion, but what was the reason for that?
> > > Konstantin
> > 
> > I don't know why PROD_ALIGN/CONS_ALIGN use 128 byte alignment; it seems unnecessary if the cache line is only 64 bytes.  An alternate
> > fix would be to just use cache line alignment for these fields (since memzones are already cache line aligned). 
> 
> Yes, had the same thought.
> 
> > Maybe there is some deeper  reason for the >= 128-byte alignment logic in rte_ring.h?
> 
> Might be, would be good to hear opinion the author of that change. 

It gives improved performance for core-2-core transfer.

/Bruce