From mboxrd@z Thu Jan 1 00:00:00 1970 From: Olivier MATZ Subject: Re: i40e: pci probe fails when using one bogus sfp Date: Tue, 13 Jun 2017 10:27:31 +0200 Message-ID: <20170613102731.518aa083@glumotte.dev.6wind.com> References: <20170608112917.22fb51eb@platinum> <20170608100154.GA56168@bricha3-MOBL3.ger.corp.intel.com> <20170608121348.5c2f538a@platinum> <94479800C636CB44BD422CB454846E0131FC734C@SHSMSX101.ccr.corp.intel.com> <20170612114530.0eab4314@platinum> <9BB6961774997848B5B42BEC655768F810DA1FAE@SHSMSX103.ccr.corp.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable Cc: "Xing, Beilei" , "Richardson, Bruce" , "Zhang, Helin" , "dev@dpdk.org" To: "Wu, Jingjing" Return-path: Received: from mail-wr0-f182.google.com (mail-wr0-f182.google.com [209.85.128.182]) by dpdk.org (Postfix) with ESMTP id 5132A568A for ; Tue, 13 Jun 2017 10:27:17 +0200 (CEST) Received: by mail-wr0-f182.google.com with SMTP id g76so127022126wrd.1 for ; Tue, 13 Jun 2017 01:27:17 -0700 (PDT) In-Reply-To: <9BB6961774997848B5B42BEC655768F810DA1FAE@SHSMSX103.ccr.corp.intel.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi Jingjing, On Mon, 12 Jun 2017 16:23:47 +0000, "Wu, Jingjing" = wrote: > HI, Olivier >=20 > > Thank you for your quick answer. > >=20 > > Yes, the pci probing continues for the other ports even if one port > > failed (since v17.05, commit 10f6c93cea). > >=20 > > But I find a bit strange to have this check about the SFP in the > > PCI probing function instead of having it the port initialization > > function. My understanding is the SFP check is not related to PCI > > probing. Is it consistent with other drivers? > > =20 > Could your customer help to check what is the exactly error code is by > Checking the "hw->aq.asq_last_status" when eth_i40e_dev_init() fails. I'm afraid it won't be possible, since it's a random issue that is not reproducible. What do you think about adding a log in i40e_dev_sync_phy_type() to display the status value in case of failure? It would help for next times. I can submit a patch for that if you want. > Yes, it seems better PHY init fails doesn't block PCI probe. Just compare= d with i40e > Kernel version, PHY init fails doesn't block CPI probe. And there is watc= hdog task to > Check the PHY status. But DPDK is polling mode, If PCI probe fails, PCI p= robe continues, > then application need poll PHY status to support SFP change. =46rom what I understand, i40e_dev_sync_phy_type() was added to know the PHY capabilities, which useful for instance for devinfo(). Indeed, devinfo() can be call before the port is started, so we need to have get the PHY capabilities before starting the port. I've done a quick patch that: - keeps the call to i40e_dev_sync_phy_type() in pci probing but continue in case of failure - add another call to i40e_dev_sync_phy_type() in port start function I think it would solve the issue without impacting the result of the devinfo() function. What would you think of a patch like this? > And I also checked ixgbe driver, it seems phy init is done at probe time. > In my opinion, dev_start and dev_stop is meaning ready for receiving and = transmitting > packets, it may not be suitable to put it in the start/stop phase. I'm wondering: what would/should occur if the SFP is unplugged and replugged while the port is running? I suppose we don't have any PCI notification when unplugging/plugging the SFP, so I'm not sure we should have this check at the PCI level, because the application does not know if the bus has to be probed again. Thanks Olivier